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FLASHCTRL_0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected

Registers

CONFIG

WRADDR

WRDATA

KEY

TCONTROL


CONFIG

Controller Configuration
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFIG CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPMD RDSEN DPFEN PFINH SQWEN ERASEEN BUFSTS BUSYF

SPMD : Flash Speed Mode.
bits : 0 - 1 (2 bit)

Enumeration:

0 : MODE0

Read and write the Flash at speed mode 0.

1 : MODE1

Read and write the Flash at speed mode 1.

2 : MODE2

Read and write the Flash at speed mode 2.

3 : MODE3

Read and write the Flash at speed mode 3.

End of enumeration elements list.

RDSEN : Read Store Mode Enable.
bits : 4 - 4 (1 bit)

Enumeration:

0 : DISABLED

Disable read store mode.

1 : ENABLED

Enable read store mode.

End of enumeration elements list.

DPFEN : Data Prefetch Enable.
bits : 6 - 6 (1 bit)

Enumeration:

0 : DISABLED

Data accesses are excluded from the prefetch buffer.

1 : ENABLED

Data accesses are included in the prefetch buffer.

End of enumeration elements list.

PFINH : Prefetch Inhibit.
bits : 7 - 7 (1 bit)

Enumeration:

0 : INACTIVE

Any reads from Flash are prefetched until the prefetch buffer is full.

1 : ACTIVE

Inhibit the prefetch engine.

End of enumeration elements list.

SQWEN : Flash Write Sequence Enable.
bits : 16 - 16 (1 bit)

Enumeration:

0 : DISABLED

Disable sequential write mode.

1 : ENABLED

Enable sequential write mode.

End of enumeration elements list.

ERASEEN : Flash Page Erase Enable.
bits : 18 - 18 (1 bit)

Enumeration:

0 : DISABLED

Writes to the WRDATA field will initiate a write to Flash at the address in the WRADDR field.

1 : ENABLED

Writes to the WRDATA field will initiate an erase of the Flash page containing the address in the WRADDR field.

End of enumeration elements list.

BUFSTS : Flash Buffer Status.
bits : 19 - 19 (1 bit)
access : read-only

Enumeration:

0 : EMPTY

The Flash controller write data buffer is empty.

1 : FULL

The Flash controller write data buffer is full.

End of enumeration elements list.

BUSYF : Flash Operation Busy Flag.
bits : 20 - 20 (1 bit)
access : read-only

Enumeration:

0 : NOT_SET

The Flash interface is not busy.

1 : SET

The Flash interface is busy with an operation.

End of enumeration elements list.


WRADDR

Flash Write Address
address_offset : 0xA0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WRADDR WRADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRADDR

WRADDR : Flash Write Address.
bits : 0 - 31 (32 bit)


WRDATA

Flash Write Data
address_offset : 0xB0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WRDATA WRDATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRDATA

WRDATA : Flash Write Data.
bits : 0 - 31 (32 bit)
access : write-only


KEY

Flash Modification Key
address_offset : 0xC0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEY KEY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY

KEY : Flash Key.
bits : 0 - 7 (8 bit)

Enumeration:

90 : MULTI_LOCK

None

165 : INITIAL_UNLOCK

None

241 : SINGLE_UNLOCK

None

242 : MULTI_UNLOCK

None

End of enumeration elements list.


TCONTROL

Flash Timing Control
address_offset : 0xD0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TCONTROL TCONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLRTMD

FLRTMD : Flash Read Timing Mode.
bits : 6 - 6 (1 bit)

Enumeration:

0 : SLOW

Configure the Flash read controller for AHB clocks below 20 MHz.

1 : FAST

Configure the Flash read controller for AHB clocks above 20 MHz.

End of enumeration elements list.



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