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Port_Standard

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected

Registers

PB

PBPIN

PBMDSEL

PBSKIPEN

PBOUTMD

PBDRV

PM

PMEN

PBLOCK

PBPGEN

PBPGPHASE


PB

Output Latch
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PB PB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PB

PB : Output Latch.
bits : 0 - 15 (16 bit)


PBPIN

Pin Value
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBPIN PBPIN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBPIN

PBPIN : Pin Value.
bits : 0 - 15 (16 bit)
access : read-only


PBMDSEL

Mode Select
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBMDSEL PBMDSEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBMDSEL

PBMDSEL : Mode Select.
bits : 0 - 15 (16 bit)


PBSKIPEN

Crossbar Pin Skip Enable
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBSKIPEN PBSKIPEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBSKIPEN

PBSKIPEN : Crossbar Pin Skip Enable.
bits : 0 - 15 (16 bit)


PBOUTMD

Output Mode
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBOUTMD PBOUTMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBOUTMD

PBOUTMD : Output Mode.
bits : 0 - 15 (16 bit)


PBDRV

Drive Strength
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBDRV PBDRV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBDRV PBPUEN

PBDRV : Drive Strength.
bits : 0 - 15 (16 bit)

PBPUEN : Port Bank Weak Pull-up Enable.
bits : 16 - 16 (1 bit)

Enumeration:

0 : DISABLED

Disable weak pull-ups for this port.

1 : ENABLED

Enable weak pull-ups for this port.

End of enumeration elements list.


PM

Port Match Value
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PM PM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM

PM : Port Match Value.
bits : 0 - 15 (16 bit)


PMEN

Port Match Enable
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMEN PMEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PMEN

PMEN : Port Match Enable.
bits : 0 - 15 (16 bit)


PBLOCK

Lock Control
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBLOCK PBLOCK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBLOCK

PBLOCK : Port Bank Lock.
bits : 0 - 15 (16 bit)


PBPGEN

Pulse Generator Pin Enable
address_offset : 0x90 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBPGEN PBPGEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBPGEN

PBPGEN : Pulse Generator Pin Enable.
bits : 0 - 15 (16 bit)


PBPGPHASE

Pulse Generator Phase
address_offset : 0xA0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PBPGPHASE PBPGPHASE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PBPGPH0 PBPGPH1

PBPGPH0 : Pulse Generator Phase 0.
bits : 0 - 15 (16 bit)

PBPGPH1 : Pulse Generator Phase 1.
bits : 16 - 31 (16 bit)



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