Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected
System Reset Source Enable
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VMONREN : Voltage Supply Monitor VDD Reset Enable.
bits : 2 - 2 (1 bit)
Enumeration:
0 : DISABLED
Disable the Voltage Supply Monitor VDD event as a reset source.
1 : ENABLED
Enable the Voltage Supply Monitor VDD event as a reset source.
End of enumeration elements list.
MCDREN : Missing Clock Detector Reset Enable.
bits : 4 - 4 (1 bit)
Enumeration:
0 : DISABLED
Disable the Missing Clock Detector event as a reset source.
1 : ENABLED
Enable the Missing Clock Detector event as a reset source.
End of enumeration elements list.
WDTREN : Watchdog Timer Reset Enable.
bits : 5 - 5 (1 bit)
Enumeration:
0 : DISABLED
Disable the Watchdog Timer event as a reset source.
1 : ENABLED
Enable the Watchdog Timer event as a reset source.
End of enumeration elements list.
SWREN : Software Reset.
bits : 6 - 6 (1 bit)
Enumeration:
0 : DISABLED
Do not generate a Software Reset.
1 : ENABLED
Generate a Software Reset.
End of enumeration elements list.
CMP0REN : Comparator 0 Reset Enable.
bits : 7 - 7 (1 bit)
Enumeration:
0 : DISABLED
Disable the Comparator 0 event as a reset source.
1 : ENABLED
Enable the Comparator 0 event as a reset source.
End of enumeration elements list.
CMP1REN : Comparator 1 Reset Enable.
bits : 8 - 8 (1 bit)
Enumeration:
0 : DISABLED
Disable the Comparator 1 event as a reset source.
1 : ENABLED
Enable the Comparator 1 event as a reset source.
End of enumeration elements list.
USB0REN : USB0 Reset Enable.
bits : 9 - 9 (1 bit)
Enumeration:
0 : DISABLED
Disable the USB0 reset event as a reset source.
1 : ENABLED
Enable the USB0 reset event as a reset source.
End of enumeration elements list.
RTC0REN : RTC0 Reset Enable.
bits : 10 - 10 (1 bit)
Enumeration:
0 : DISABLED
Disable the RTC0 event as a reset source.
1 : ENABLED
Enable the RTC0 event as a reset source.
End of enumeration elements list.
WAKEREN : PMU Wakeup Reset Enable.
bits : 11 - 11 (1 bit)
Enumeration:
1 : ENABLED
Enable the PMU Wakeup event as a reset source.
End of enumeration elements list.
System Reset Flags
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PINRF : Pin Reset Flag.
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A /RESET pin event did not cause the last system reset.
1 : SET
A /RESET pin event caused the last system reset.
End of enumeration elements list.
PORRF : Power-On Reset Flag.
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Power-On Reset event did not cause the last system reset.
1 : SET
A Power-On Reset event caused the last system reset.
End of enumeration elements list.
VMONRF : Voltage Supply Monitor VDD Reset Flag.
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Voltage Supply Monitor VDD Reset event did not cause the last system reset.
1 : SET
A Voltage Supply Monitor VDD Reset event caused the last system reset.
End of enumeration elements list.
CORERF : Core Reset Flag.
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Core Reset event did not cause the last system reset.
1 : SET
A Core Reset event caused the last system reset.
End of enumeration elements list.
MCDRF : Missing Clock Detector Reset Flag.
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Missing Clock Detector event did not cause the last system reset.
1 : SET
A Missing Clock Detector event caused the last system reset.
End of enumeration elements list.
WDTRF : Watchdog Timer Reset Flag.
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Watchdog Timer event did not cause the last system reset.
1 : SET
A Watchdog Timer event caused the last system reset.
End of enumeration elements list.
SWRF : Software Reset Flag.
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Software Reset event did not cause the last system reset.
1 : SET
A Software Reset event caused the last system reset.
End of enumeration elements list.
CMP0RF : Comparator 0 Reset Flag.
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Comparator 0 event did not cause the last system reset.
1 : SET
A Comparator 0 event caused the last system reset.
End of enumeration elements list.
CMP1RF : Comparator 1 Reset Flag.
bits : 8 - 8 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A Comparator 1 event did not cause the last system reset.
1 : SET
A Comparator 1 event caused the last system reset.
End of enumeration elements list.
USB0RF : USB0 Reset Flag.
bits : 9 - 9 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A USB0 Reset event did not cause the last system reset.
1 : SET
A USB0 Reset event caused the last system reset.
End of enumeration elements list.
RTC0RF : RTC0 Reset Flag.
bits : 10 - 10 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
An RTC0 event did not cause the last system reset.
1 : SET
An RTC0 event caused the last system reset.
End of enumeration elements list.
WAKERF : PMU Wakeup Reset Flag.
bits : 11 - 11 (1 bit)
access : read-only
Enumeration:
0 : NOT_SET
A PMU Wakeup event did not cause the last system reset.
1 : SET
A PMU Wakeup event caused the last system reset.
End of enumeration elements list.
Configuration Options
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PMSEL : Power Mode Select.
bits : 0 - 0 (1 bit)
Enumeration:
0 : PM9_DIS
Power Mode < PM9.
1 : PM9_EN
Power Mode = PM9.
End of enumeration elements list.
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