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Timer

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xFFC byte (0x0)
mem_usage : registers
protection : not protected

Registers

CONFIG

CLKDIV

COUNT

CAPTURE


CONFIG

High and Low Timer Configuration
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFIG CONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCLK LMSTREN SPLITEN LEXIEN LOVFIEN LMD LSTATE LRUN LEXI LOVFI HCLK MSTRUN HMSTREN DBGMD HEXIEN HOVFIEN HMD HSTATE HRUN HEXI HOVFI

LCLK : Low Clock Source.
bits : 0 - 1 (2 bit)

Enumeration:

0 : APB

Select the APB clock as the timer source.

1 : EXTOSCN

Select the external oscillator clock as the timer source. The external oscillator must run slower than one-half the APB clock.

2 : TIMER_CLKDIV

Select the dedicated 8-bit prescaler as the timer source.

3 : CT_FALLING_EDGE

Select falling edges of the CT signal as the timer clock source.

End of enumeration elements list.

LMSTREN : Low Run Master Enable.
bits : 4 - 4 (1 bit)

Enumeration:

0 : DISABLED

MSTRUN does not need to be set for the low timer to run.

1 : ENABLED

MSTRUN must be set for the low timer to run.

End of enumeration elements list.

SPLITEN : Split Mode Enable.
bits : 5 - 5 (1 bit)

Enumeration:

0 : DISABLED

The timer operates as a single 32-bit timer controlled by the high timer fields.

1 : ENABLED

The timer operates as two independent 16-bit timers.

End of enumeration elements list.

LEXIEN : Low Timer Extra Interrupt Enable.
bits : 6 - 6 (1 bit)

Enumeration:

0 : DISABLED

The state of the LEXI flag does not affect the low timer interrupt.

1 : ENABLED

A low timer interrupt request is generated if LEXI is set to 1.

End of enumeration elements list.

LOVFIEN : Low Timer Overflow Interrupt Enable.
bits : 7 - 7 (1 bit)

Enumeration:

0 : DISABLED

The state of LOVFI does not affect the low timer interrupt.

1 : ENABLED

A low timer interrupt request is generated if LOVFI = 1.

End of enumeration elements list.

LMD : Low Timer Mode.
bits : 8 - 10 (3 bit)

Enumeration:

0 : AUTO_RELOAD

The low timer is in Auto-Reload Mode.

1 : UP_DOWN

The low timer is in Up/Down Count Mode.

2 : FALL_CAPTURE

The low timer is in Falling Edge Capture Mode.

3 : RISE_CAPTURE

The low timer is in Rising Edge Capture Mode.

4 : LOW_CAPTURE

The low timer is in Low Time Capture Mode.

5 : HIGH_CAPTURE

The low timer is in High Time Capture Mode.

6 : DC_CAPTURE

The low timer is in Duty Cycle Capture Mode.

7 : ONESHOT

The low timer is in Oneshot Mode.

End of enumeration elements list.

LSTATE : Low Multi Purpose State Indicator.
bits : 12 - 12 (1 bit)

Enumeration:

0 : NOT_SET

None

1 : SET

None

End of enumeration elements list.

LRUN : Run Control Low.
bits : 13 - 13 (1 bit)

Enumeration:

0 : STOP

Stop the low timer if split mode is enabled (SPLITEN = 1).

1 : START

The low timer runs if split mode is enabled (SPLITEN = 1) and (LMSTREN = 0 or MSTRUN = 1).

End of enumeration elements list.

LEXI : Low Timer Extra Interrupt Flag.
bits : 14 - 14 (1 bit)

Enumeration:

0 : NOT_SET

Read: A low timer extra interrupt is not pending. Write: Clear the interrupt.

1 : SET

Read: Indicates the low 16-bit timer has been captured, reloaded with all 1's when counting down, or the timer matched the capture register in PWM mode. This interrupt flag can be set by hardware in all modes except Auto-Reload and Toggle. This flag is not set by hardware when split mode is disabled (SPLITEN = 0). Write: Force a low timer extra interrupt.

End of enumeration elements list.

LOVFI : Low Timer Overflow Interrupt.
bits : 15 - 15 (1 bit)

Enumeration:

0 : NOT_SET

Read: A low timer overflow interrupt is not pending. Write: Clear the interrupt.

1 : SET

Read: The low 16-bit timer has wrapped or reloaded after reaching all 1's. This bit is set by the module regardless of the state of SPLITEN and can be set in all modes. Write: Force a low timer overflow interrupt.

End of enumeration elements list.

HCLK : High Clock Source.
bits : 16 - 17 (2 bit)

Enumeration:

0 : APB

Select the APB clock as the timer source.

1 : EXTOSCN

Select the external oscillator clock as the timer source. The external oscillator must run slower than one-half the APB clock.

2 : TIMER_CLKDIV

Select the dedicated 8-bit prescaler as the timer source.

3 : CT_FALLING_EDGE

Select falling edges of the CT signal as the timer clock source.

End of enumeration elements list.

MSTRUN : Master Run Control.
bits : 19 - 19 (1 bit)

Enumeration:

0 : STOP

Disable the master run control for all timers.

1 : START

Enable the master run control for all timers.

End of enumeration elements list.

HMSTREN : High Master Enable.
bits : 20 - 20 (1 bit)

Enumeration:

0 : DISABLED

MSTRUN does not need to be set for the high timer to run.

1 : ENABLED

MSTRUN must be set for the high timer to run.

End of enumeration elements list.

DBGMD : Timer Debug Mode.
bits : 21 - 21 (1 bit)

Enumeration:

0 : RUN

The Timer will continue to operate while the core is halted in debug mode.

1 : HALT

A debug breakpoint will cause the Timer to halt.

End of enumeration elements list.

HEXIEN : High Timer Extra Interrupt Enable.
bits : 22 - 22 (1 bit)

Enumeration:

0 : DISABLED

The state of the HEXI flag does not affect the high timer interrupt.

1 : ENABLED

A high timer interrupt request is generated if HEXI is set to 1.

End of enumeration elements list.

HOVFIEN : High Timer Overflow Interrupt Enable.
bits : 23 - 23 (1 bit)

Enumeration:

0 : DISABLED

The state of HOVFI does not affect the high timer interrupt.

1 : ENABLED

A high timer interrupt request is generated if HOVFI is set to 1.

End of enumeration elements list.

HMD : High Timer Mode.
bits : 24 - 27 (4 bit)

Enumeration:

0 : AUTO_RELOAD

The high 16-bit timer or entire 32-bit timer is in Auto-Reload Mode.

1 : UP_DOWN

The high 16-bit timer or entire 32-bit timer is in Up/Down Count Mode.

2 : FALL_CAPTURE

The high 16-bit timer or entire 32-bit timer is in Falling Edge Capture Mode.

3 : RISE_CAPTURE

The high 16-bit timer or entire 32-bit timer is in Rising Edge Capture Mode.

4 : LOW_CAPTURE

The high 16-bit timer or entire 32-bit timer is in Low Time Capture Mode.

5 : HIGH_CAPTURE

The high 16-bit timer or entire 32-bit timer is in High Time Capture Mode.

6 : DC_CAPTURE

The high 16-bit timer or entire 32-bit timer is in Duty Cycle Capture Mode.

7 : ONESHOT

The high 16-bit timer or entire 32-bit timer is in Oneshot Mode.

8 : TOGGLE

The high 16-bit timer or entire 32-bit timer is in Toggle Output Mode.

9 : PWM

The high 16-bit timer or entire 32-bit timer is in PWM Mode.

End of enumeration elements list.

HSTATE : High Multi Purpose State Indicator.
bits : 28 - 28 (1 bit)

Enumeration:

0 : NOT_SET

None

1 : SET

None

End of enumeration elements list.

HRUN : High Run Control.
bits : 29 - 29 (1 bit)

Enumeration:

0 : STOP

Stop the high timer or entire 32-bit timer.

1 : START

The high timer runs if HMSTREN = 0 or MSTRUN = 1. The full 32-bit timer runs if split mode is disabled and (HMSTREN = 0 or MSTRUN = 1).

End of enumeration elements list.

HEXI : High Timer Extra Interrupt Flag.
bits : 30 - 30 (1 bit)

Enumeration:

0 : NOT_SET

Read: A high timer extra interrupt is not pending. Write: Clear the interrupt.

1 : SET

Read: Indicates the high 16-bit timer (or 32-bit timer if SPLITEN = 0) has been captured, reloaded with all 1's when counting down, or the timer matched the capture register in PWM mode. This interrupt flag can be set by the timer module in all modes except Auto-Reload and Toggle. Write: Force a high timer extra interrupt.

End of enumeration elements list.

HOVFI : High Timer Overflow Interrupt Flag.
bits : 31 - 31 (1 bit)

Enumeration:

0 : NOT_SET

Read: A high timer overflow interrupt is not pending. Write: Clear the interrupt.

1 : SET

Read: If split mode is enabled (SPLITEN = 1), this value indicates the high 16-bit timer has wrapped or reloaded after reaching all 1's. If split mode is disabled (SPLITEN = 0), this value indicates the 32-bit timer has wrapped or reloaded after reaching all 1's. The timer module can set this bit in all modes. Write: Force a high timer overflow interrupt.

End of enumeration elements list.


CLKDIV

Module Clock Divider Control
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLKDIV CLKDIV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKDIVRL CLKDIVCT

CLKDIVRL : Clock Divider Reload Value.
bits : 0 - 7 (8 bit)

CLKDIVCT : Clock Divider Counter.
bits : 16 - 23 (8 bit)


COUNT

Timer Value
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COUNT COUNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCOUNT HCOUNT

LCOUNT : Low Timer Count.
bits : 0 - 15 (16 bit)

HCOUNT : High Timer Count.
bits : 16 - 31 (16 bit)


CAPTURE

Timer Capture/Reload Value
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTURE CAPTURE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCCR HCCR

LCCR : Low Timer Capture/Reload.
bits : 0 - 15 (16 bit)

HCCR : High Timer Capture/Reload.
bits : 16 - 31 (16 bit)



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