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MFS0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x40 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x4 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0xC Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x14 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x18 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x20 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x24 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x2C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x3C Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

Registers

UART_SMR

CSIO_SMR

LIN_SMR

I2C_SMR

UART_SCR

CSIO_SCR

LIN_SCR

I2C_IBCR

I2C_ISBA

I2C_ISMK

UART_FCR0

CSIO_FCR0

LIN_FCR0

I2C_FCR0

UART_FCR1

CSIO_FCR1

LIN_FCR1

I2C_FCR1

UART_FBYTE1

CSIO_FBYTE1

LIN_FBYTE1

I2C_FBYTE1

UART_FBYTE2

CSIO_FBYTE2

LIN_FBYTE2

I2C_FBYTE2

CSIO_SCSTR0

I2C_NFCR

CSIO_SCSTR1

I2C_EIBCR

CSIO_SCSTR2

CSIO_SCSTR3

CSIO_SACSR

CSIO_STMR

CSIO_STMCR

CSIO_SCSCR

CSIO_TBYTE0

CSIO_TBYTE1

UART_ESCR

CSIO_ESCR

LIN_ESCR

I2C_IBSR

CSIO_TBYTE2

CSIO_TBYTE3

UART_SSR

CSIO_SSR

LIN_SSR

I2C_SSR

UART_RDR

UART_TDR

CSIO_RDR

CSIO_TDR

LIN_RDR

LIN_TDR

I2C_RDR

I2C_TDR

UART_BGR

CSIO_BGR

LIN_BGR

I2C_BGR


UART_SMR

register UART_SMR
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SMR UART_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE BDS SBL MD

SOE : bitfield SOE
bits : 0 - -1 (0 bit)
access : read-write

BDS : bitfield BDS
bits : 2 - 1 (0 bit)
access : read-write

SBL : bitfield SBL
bits : 3 - 2 (0 bit)
access : read-write

MD : bitfield MD
bits : 5 - 6 (2 bit)
access : read-write


CSIO_SMR

register CSIO_SMR
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SMR CSIO_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE SCKE BDS SCINV MD

SOE : bitfield SOE
bits : 0 - -1 (0 bit)
access : read-write

SCKE : bitfield SCKE
bits : 1 - 0 (0 bit)
access : read-write

BDS : bitfield BDS
bits : 2 - 1 (0 bit)
access : read-write

SCINV : bitfield SCINV
bits : 3 - 2 (0 bit)
access : read-write

MD : bitfield MD
bits : 5 - 6 (2 bit)
access : read-write


LIN_SMR

register LIN_SMR
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_SMR LIN_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SOE SBL WUCR MD

SOE : bitfield SOE
bits : 0 - -1 (0 bit)
access : read-write

SBL : bitfield SBL
bits : 3 - 2 (0 bit)
access : read-write

WUCR : bitfield WUCR
bits : 4 - 3 (0 bit)
access : read-write

MD : bitfield MD
bits : 5 - 6 (2 bit)
access : read-write


I2C_SMR

register I2C_SMR
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_SMR I2C_SMR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TIE RIE MD

TIE : bitfield TIE
bits : 2 - 1 (0 bit)
access : read-write

RIE : bitfield RIE
bits : 3 - 2 (0 bit)
access : read-write

MD : bitfield MD
bits : 5 - 6 (2 bit)
access : read-write


UART_SCR

register UART_SCR
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SCR UART_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE UPCL

TXE : bitfield TXE
bits : 0 - -1 (0 bit)
access : read-write

RXE : bitfield RXE
bits : 1 - 0 (0 bit)
access : read-write

TBIE : bitfield TBIE
bits : 2 - 1 (0 bit)
access : read-write

TIE : bitfield TIE
bits : 3 - 2 (0 bit)
access : read-write

RIE : bitfield RIE
bits : 4 - 3 (0 bit)
access : read-write

UPCL : bitfield UPCL
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SCR

register CSIO_SCR
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCR CSIO_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE SPI MS UPCL

TXE : bitfield TXE
bits : 0 - -1 (0 bit)
access : read-write

RXE : bitfield RXE
bits : 1 - 0 (0 bit)
access : read-write

TBIE : bitfield TBIE
bits : 2 - 1 (0 bit)
access : read-write

TIE : bitfield TIE
bits : 3 - 2 (0 bit)
access : read-write

RIE : bitfield RIE
bits : 4 - 3 (0 bit)
access : read-write

SPI : bitfield SPI
bits : 5 - 4 (0 bit)
access : read-write

MS : bitfield MS
bits : 6 - 5 (0 bit)
access : read-write

UPCL : bitfield UPCL
bits : 7 - 6 (0 bit)
access : read-write


LIN_SCR

register LIN_SCR
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_SCR LIN_SCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TXE RXE TBIE TIE RIE LBR MS UPCL

TXE : bitfield TXE
bits : 0 - -1 (0 bit)
access : read-write

RXE : bitfield RXE
bits : 1 - 0 (0 bit)
access : read-write

TBIE : bitfield TBIE
bits : 2 - 1 (0 bit)
access : read-write

TIE : bitfield TIE
bits : 3 - 2 (0 bit)
access : read-write

RIE : bitfield RIE
bits : 4 - 3 (0 bit)
access : read-write

LBR : bitfield LBR
bits : 5 - 4 (0 bit)
access : read-write

MS : bitfield MS
bits : 6 - 5 (0 bit)
access : read-write

UPCL : bitfield UPCL
bits : 7 - 6 (0 bit)
access : read-write


I2C_IBCR

register I2C_IBCR
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_IBCR I2C_IBCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INT BER INTE CNDE WSEL ACKE ACT_SCC MSS

INT : bitfield INT
bits : 0 - -1 (0 bit)
access : read-write

BER : bitfield BER
bits : 1 - 0 (0 bit)
access : read-only

INTE : bitfield INTE
bits : 2 - 1 (0 bit)
access : read-write

CNDE : bitfield CNDE
bits : 3 - 2 (0 bit)
access : read-write

WSEL : bitfield WSEL
bits : 4 - 3 (0 bit)
access : read-write

ACKE : bitfield ACKE
bits : 5 - 4 (0 bit)
access : read-write

ACT_SCC : bitfield ACT_SCC
bits : 6 - 5 (0 bit)
access : read-write

MSS : bitfield MSS
bits : 7 - 6 (0 bit)
access : read-write


I2C_ISBA

register I2C_ISBA
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_ISBA I2C_ISBA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SA SAEN

SA : bitfield SA
bits : 0 - 5 (6 bit)
access : read-write

SAEN : bitfield SAEN
bits : 7 - 6 (0 bit)
access : read-write


I2C_ISMK

register I2C_ISMK
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_ISMK I2C_ISMK read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SM EN

SM : bitfield SM
bits : 0 - 5 (6 bit)
access : read-write

EN : bitfield EN
bits : 7 - 6 (0 bit)
access : read-write


UART_FCR0

register UART_FCR0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FCR0 UART_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : bitfield FE1
bits : 0 - -1 (0 bit)
access : read-write

FE2 : bitfield FE2
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : bitfield FCL1
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : bitfield FCL2
bits : 3 - 2 (0 bit)
access : read-write

FSET : bitfield FSET
bits : 4 - 3 (0 bit)
access : read-write

FLD : bitfield FLD
bits : 5 - 4 (0 bit)
access : read-write

FLST : bitfield FLST
bits : 6 - 5 (0 bit)
access : read-only


CSIO_FCR0

register CSIO_FCR0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FCR0 CSIO_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : bitfield FE1
bits : 0 - -1 (0 bit)
access : read-write

FE2 : bitfield FE2
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : bitfield FCL1
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : bitfield FCL2
bits : 3 - 2 (0 bit)
access : read-write

FSET : bitfield FSET
bits : 4 - 3 (0 bit)
access : read-write

FLD : bitfield FLD
bits : 5 - 4 (0 bit)
access : read-write

FLST : bitfield FLST
bits : 6 - 5 (0 bit)
access : read-only


LIN_FCR0

register LIN_FCR0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FCR0 LIN_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : bitfield FE1
bits : 0 - -1 (0 bit)
access : read-write

FE2 : bitfield FE2
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : bitfield FCL1
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : bitfield FCL2
bits : 3 - 2 (0 bit)
access : read-write

FSET : bitfield FSET
bits : 4 - 3 (0 bit)
access : read-write

FLD : bitfield FLD
bits : 5 - 4 (0 bit)
access : read-write

FLST : bitfield FLST
bits : 6 - 5 (0 bit)
access : read-only


I2C_FCR0

register I2C_FCR0
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FCR0 I2C_FCR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FE1 FE2 FCL1 FCL2 FSET FLD FLST

FE1 : bitfield FE1
bits : 0 - -1 (0 bit)
access : read-write

FE2 : bitfield FE2
bits : 1 - 0 (0 bit)
access : read-write

FCL1 : bitfield FCL1
bits : 2 - 1 (0 bit)
access : read-write

FCL2 : bitfield FCL2
bits : 3 - 2 (0 bit)
access : read-write

FSET : bitfield FSET
bits : 4 - 3 (0 bit)
access : read-write

FLD : bitfield FLD
bits : 5 - 4 (0 bit)
access : read-write

FLST : bitfield FLST
bits : 6 - 5 (0 bit)
access : read-only


UART_FCR1

register UART_FCR1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FCR1 UART_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : bitfield FSEL
bits : 0 - -1 (0 bit)
access : read-write

FTIE : bitfield FTIE
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : bitfield FDRQ
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : bitfield FRIIE
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : bitfield FLSTE
bits : 4 - 3 (0 bit)
access : read-write


CSIO_FCR1

register CSIO_FCR1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FCR1 CSIO_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : bitfield FSEL
bits : 0 - -1 (0 bit)
access : read-write

FTIE : bitfield FTIE
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : bitfield FDRQ
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : bitfield FRIIE
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : bitfield FLSTE
bits : 4 - 3 (0 bit)
access : read-write


LIN_FCR1

register LIN_FCR1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FCR1 LIN_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : bitfield FSEL
bits : 0 - -1 (0 bit)
access : read-write

FTIE : bitfield FTIE
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : bitfield FDRQ
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : bitfield FRIIE
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : bitfield FLSTE
bits : 4 - 3 (0 bit)
access : read-write


I2C_FCR1

register I2C_FCR1
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FCR1 I2C_FCR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 FSEL FTIE FDRQ FRIIE FLSTE

FSEL : bitfield FSEL
bits : 0 - -1 (0 bit)
access : read-write

FTIE : bitfield FTIE
bits : 1 - 0 (0 bit)
access : read-write

FDRQ : bitfield FDRQ
bits : 2 - 1 (0 bit)
access : read-write

FRIIE : bitfield FRIIE
bits : 3 - 2 (0 bit)
access : read-write

FLSTE : bitfield FLSTE
bits : 4 - 3 (0 bit)
access : read-write


UART_FBYTE1

register UART_FBYTE1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FBYTE1 UART_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_FBYTE1

register CSIO_FBYTE1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FBYTE1 CSIO_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

LIN_FBYTE1

register LIN_FBYTE1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FBYTE1 LIN_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

I2C_FBYTE1

register I2C_FBYTE1
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FBYTE1 I2C_FBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

UART_FBYTE2

register UART_FBYTE2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_FBYTE2 UART_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_FBYTE2

register CSIO_FBYTE2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_FBYTE2 CSIO_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

LIN_FBYTE2

register LIN_FBYTE2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_FBYTE2 LIN_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

I2C_FBYTE2

register I2C_FBYTE2
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_FBYTE2 I2C_FBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_SCSTR0

register CSIO_SCSTR0
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR0 CSIO_SCSTR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CSHD

CSHD : bitfield CSHD
bits : 0 - 6 (7 bit)
access : read-write


I2C_NFCR

register I2C_NFCR
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_NFCR I2C_NFCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 NFT

NFT : bitfield NFT
bits : 0 - 3 (4 bit)
access : read-write


CSIO_SCSTR1

register CSIO_SCSTR1
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR1 CSIO_SCSTR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CSSU

CSSU : bitfield CSSU
bits : 0 - 6 (7 bit)
access : read-write


I2C_EIBCR

register I2C_EIBCR
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_EIBCR I2C_EIBCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BEC SOCE SCLC SDAC SCLS SDAS

BEC : bitfield BEC
bits : 0 - -1 (0 bit)
access : read-write

SOCE : bitfield SOCE
bits : 1 - 0 (0 bit)
access : read-write

SCLC : bitfield SCLC
bits : 2 - 1 (0 bit)
access : read-write

SDAC : bitfield SDAC
bits : 3 - 2 (0 bit)
access : read-write

SCLS : bitfield SCLS
bits : 4 - 3 (0 bit)
access : read-write

SDAS : bitfield SDAS
bits : 5 - 4 (0 bit)
access : read-write


CSIO_SCSTR2

register CSIO_SCSTR2
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR2 CSIO_SCSTR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSDS

CSDS : bitfield CSDS
bits : 0 - 14 (15 bit)
access : read-write


CSIO_SCSTR3

register CSIO_SCSTR3
address_offset : 0x21 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSTR3 CSIO_SCSTR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_SACSR

register CSIO_SACSR
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SACSR CSIO_SACSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TMRE TDIV TSYNE TINTE TINT CSE CSEIE TBEEN

TMRE : bitfield TMRE
bits : 0 - -1 (0 bit)
access : read-write

TDIV : bitfield TDIV
bits : 1 - 3 (3 bit)
access : read-write

TSYNE : bitfield TSYNE
bits : 6 - 5 (0 bit)
access : read-write

TINTE : bitfield TINTE
bits : 7 - 6 (0 bit)
access : read-write

TINT : bitfield TINT
bits : 8 - 7 (0 bit)
access : read-write

CSE : bitfield CSE
bits : 11 - 10 (0 bit)
access : read-write

CSEIE : bitfield CSEIE
bits : 12 - 11 (0 bit)
access : read-write

TBEEN : bitfield TBEEN
bits : 13 - 12 (0 bit)
access : read-write


CSIO_STMR

register CSIO_STMR
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_STMR CSIO_STMR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TM

TM : bitfield TM
bits : 0 - 14 (15 bit)
access : read-only


CSIO_STMCR

register CSIO_STMCR
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_STMCR CSIO_STMCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TC

TC : bitfield TC
bits : 0 - 14 (15 bit)
access : read-write


CSIO_SCSCR

register CSIO_SCSCR
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SCSCR CSIO_SCSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSOE CSEN0 CSLVL CDIV SCAM

CSOE : bitfield CSOE
bits : 0 - -1 (0 bit)
access : read-write

CSEN0 : bitfield CSEN0
bits : 1 - 0 (0 bit)
access : read-write

CSLVL : bitfield CSLVL
bits : 5 - 4 (0 bit)
access : read-write

CDIV : bitfield CDIV
bits : 6 - 7 (2 bit)
access : read-write

SCAM : bitfield SCAM
bits : 9 - 8 (0 bit)
access : read-write


CSIO_TBYTE0

register CSIO_TBYTE0
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE0 CSIO_TBYTE0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_TBYTE1

register CSIO_TBYTE1
address_offset : 0x3D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE1 CSIO_TBYTE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

UART_ESCR

register UART_ESCR
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_ESCR UART_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 L P PEN INV ESBL FLWEN

L : bitfield L
bits : 0 - 1 (2 bit)
access : read-write

P : bitfield P
bits : 3 - 2 (0 bit)
access : read-write

PEN : bitfield PEN
bits : 4 - 3 (0 bit)
access : read-write

INV : bitfield INV
bits : 5 - 4 (0 bit)
access : read-write

ESBL : bitfield ESBL
bits : 6 - 5 (0 bit)
access : read-write

FLWEN : bitfield FLWEN
bits : 7 - 6 (0 bit)
access : read-write


CSIO_ESCR

register CSIO_ESCR
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_ESCR CSIO_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 L WT L3 SOP

L : bitfield L
bits : 0 - 1 (2 bit)
access : read-write

WT : bitfield WT
bits : 3 - 3 (1 bit)
access : read-write

L3 : bitfield L3
bits : 6 - 5 (0 bit)
access : read-write

SOP : bitfield SOP
bits : 7 - 6 (0 bit)
access : read-write


LIN_ESCR

register LIN_ESCR
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_ESCR LIN_ESCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DEL LBL LBIE ESBL

DEL : bitfield DEL
bits : 0 - 0 (1 bit)
access : read-write

LBL : bitfield LBL
bits : 2 - 2 (1 bit)
access : read-write

LBIE : bitfield LBIE
bits : 4 - 3 (0 bit)
access : read-write

ESBL : bitfield ESBL
bits : 6 - 5 (0 bit)
access : read-write


I2C_IBSR

register I2C_IBSR
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_IBSR I2C_IBSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BB SPC RSC AL TRX RSA RACK FBT

BB : bitfield BB
bits : 0 - -1 (0 bit)
access : read-only

SPC : bitfield SPC
bits : 1 - 0 (0 bit)
access : read-write

RSC : bitfield RSC
bits : 2 - 1 (0 bit)
access : read-write

AL : bitfield AL
bits : 3 - 2 (0 bit)
access : read-only

TRX : bitfield TRX
bits : 4 - 3 (0 bit)
access : read-only

RSA : bitfield RSA
bits : 5 - 4 (0 bit)
access : read-only

RACK : bitfield RACK
bits : 6 - 5 (0 bit)
access : read-only

FBT : bitfield FBT
bits : 7 - 6 (0 bit)
access : read-only


CSIO_TBYTE2

register CSIO_TBYTE2
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE2 CSIO_TBYTE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

CSIO_TBYTE3

register CSIO_TBYTE3
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TBYTE3 CSIO_TBYTE3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

UART_SSR

register UART_SSR
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_SSR UART_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE FRE PE REC

TBI : bitfield TBI
bits : 0 - -1 (0 bit)
access : read-only

TDRE : bitfield TDRE
bits : 1 - 0 (0 bit)
access : read-only

RDRF : bitfield RDRF
bits : 2 - 1 (0 bit)
access : read-only

ORE : bitfield ORE
bits : 3 - 2 (0 bit)
access : read-only

FRE : bitfield FRE
bits : 4 - 3 (0 bit)
access : read-only

PE : bitfield PE
bits : 5 - 4 (0 bit)
access : read-only

REC : bitfield REC
bits : 7 - 6 (0 bit)
access : read-write


CSIO_SSR

register CSIO_SSR
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_SSR CSIO_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE AWC REC

TBI : bitfield TBI
bits : 0 - -1 (0 bit)
access : read-only

TDRE : bitfield TDRE
bits : 1 - 0 (0 bit)
access : read-only

RDRF : bitfield RDRF
bits : 2 - 1 (0 bit)
access : read-only

ORE : bitfield ORE
bits : 3 - 2 (0 bit)
access : read-only

AWC : bitfield AWC
bits : 4 - 3 (0 bit)
access : read-write

REC : bitfield REC
bits : 7 - 6 (0 bit)
access : read-write


LIN_SSR

register LIN_SSR
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_SSR LIN_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE FRE LBD REC

TBI : bitfield TBI
bits : 0 - -1 (0 bit)
access : read-only

TDRE : bitfield TDRE
bits : 1 - 0 (0 bit)
access : read-only

RDRF : bitfield RDRF
bits : 2 - 1 (0 bit)
access : read-only

ORE : bitfield ORE
bits : 3 - 2 (0 bit)
access : read-only

FRE : bitfield FRE
bits : 4 - 3 (0 bit)
access : read-only

LBD : bitfield LBD
bits : 5 - 4 (0 bit)
access : read-write

REC : bitfield REC
bits : 7 - 6 (0 bit)
access : read-write


I2C_SSR

register I2C_SSR
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_SSR I2C_SSR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TBI TDRE RDRF ORE TBIE DMA TSET REC

TBI : bitfield TBI
bits : 0 - -1 (0 bit)
access : read-only

TDRE : bitfield TDRE
bits : 1 - 0 (0 bit)
access : read-only

RDRF : bitfield RDRF
bits : 2 - 1 (0 bit)
access : read-only

ORE : bitfield ORE
bits : 3 - 2 (0 bit)
access : read-only

TBIE : bitfield TBIE
bits : 4 - 3 (0 bit)
access : read-write

DMA : bitfield DMA
bits : 5 - 4 (0 bit)
access : read-write

TSET : bitfield TSET
bits : 6 - 5 (0 bit)
access : read-write

REC : bitfield REC
bits : 7 - 6 (0 bit)
access : read-write


UART_RDR

register UART_RDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_RDR UART_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 7 (8 bit)
access : read-only


UART_TDR

register UART_TDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_TDR UART_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 7 (8 bit)
access : write-only


CSIO_RDR

register CSIO_RDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_RDR CSIO_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 14 (15 bit)
access : read-only


CSIO_TDR

register CSIO_TDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_TDR CSIO_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 14 (15 bit)
access : write-only


LIN_RDR

register LIN_RDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_RDR LIN_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 6 (7 bit)
access : read-only


LIN_TDR

register LIN_TDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_TDR LIN_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 6 (7 bit)
access : write-only


I2C_RDR

register I2C_RDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_RDR I2C_RDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 6 (7 bit)
access : read-only


I2C_TDR

register I2C_TDR
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : write-only
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_TDR I2C_TDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D

D : bitfield D
bits : 0 - 6 (7 bit)
access : write-only


UART_BGR

register UART_BGR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : UART
reset_Mask : 0x0

UART_BGR UART_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1 EXT

BGR0 : bitfield BGR0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : bitfield BGR1
bits : 8 - 13 (6 bit)
access : read-write

EXT : bitfield EXT
bits : 15 - 14 (0 bit)
access : read-write


CSIO_BGR

register CSIO_BGR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : CSIO
reset_Mask : 0x0

CSIO_BGR CSIO_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1

BGR0 : bitfield BGR0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : bitfield BGR1
bits : 8 - 13 (6 bit)
access : read-write


LIN_BGR

register LIN_BGR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : LIN
reset_Mask : 0x0

LIN_BGR LIN_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1 EXT

BGR0 : bitfield BGR0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : bitfield BGR1
bits : 8 - 13 (6 bit)
access : read-write

EXT : bitfield EXT
bits : 15 - 14 (0 bit)
access : read-write


I2C_BGR

register I2C_BGR
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : I2C
reset_Mask : 0x0

I2C_BGR I2C_BGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BGR0 BGR1

BGR0 : bitfield BGR0
bits : 0 - 6 (7 bit)
access : read-write

BGR1 : bitfield BGR1
bits : 8 - 13 (6 bit)
access : read-write



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