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EXBUS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x100 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x200 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x300 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected

Registers

MODE0

MODE4

SMODE

REFTIM

PWRDWN

SDTIM

SDCMD

MODE5

MODE6

MODE7

TIM0

MEMCERR

TIM1

TIM2

TIM3

TIM4

DCLKR

EST

WEAD

ESCLR

AMODE

TIM5

TIM6

TIM7

MODE1

AREA0

AREA1

AREA2

AREA3

AREA4

AREA5

AREA6

AREA7

ATIM0

ATIM1

ATIM2

ATIM3

ATIM4

ATIM5

ATIM6

ATIM7

MODE2

MODE3


MODE0

register MODE0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE0 MODE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WDTH RBMON WEOFF NAND PAGE RDY SHRTDOUT MPXMODE ALEINV MPXDOFF MPXCSOF MOEXEUP

WDTH : bitfield WDTH
bits : 0 - 0 (1 bit)
access : read-write

RBMON : bitfield RBMON
bits : 2 - 1 (0 bit)
access : read-write

WEOFF : bitfield WEOFF
bits : 3 - 2 (0 bit)
access : read-write

NAND : bitfield NAND
bits : 4 - 3 (0 bit)
access : read-write

PAGE : bitfield PAGE
bits : 5 - 4 (0 bit)
access : read-write

RDY : bitfield RDY
bits : 6 - 5 (0 bit)
access : read-write

SHRTDOUT : bitfield SHRTDOUT
bits : 7 - 6 (0 bit)
access : read-write

MPXMODE : bitfield MPXMODE
bits : 8 - 7 (0 bit)
access : read-write

ALEINV : bitfield ALEINV
bits : 9 - 8 (0 bit)
access : read-write

MPXDOFF : bitfield MPXDOFF
bits : 11 - 10 (0 bit)
access : read-write

MPXCSOF : bitfield MPXCSOF
bits : 12 - 11 (0 bit)
access : read-write

MOEXEUP : bitfield MOEXEUP
bits : 13 - 12 (0 bit)
access : read-write


MODE4

register MODE4
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE4 MODE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SMODE

register SMODE
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SMODE SMODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SDON PDON ROFF CASEL RASEL BASEL MSDCLKOFF

SDON : bitfield SDON
bits : 0 - -1 (0 bit)
access : read-write

PDON : bitfield PDON
bits : 1 - 0 (0 bit)
access : read-write

ROFF : bitfield ROFF
bits : 2 - 1 (0 bit)
access : read-write

CASEL : bitfield CASEL
bits : 4 - 4 (1 bit)
access : read-write

RASEL : bitfield RASEL
bits : 8 - 10 (3 bit)
access : read-write

BASEL : bitfield BASEL
bits : 12 - 14 (3 bit)
access : read-write

MSDCLKOFF : bitfield MSDCLKOFF
bits : 16 - 15 (0 bit)
access : read-write


REFTIM

register REFTIM
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

REFTIM REFTIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REFC NREF PREF

REFC : bitfield REFC
bits : 0 - 14 (15 bit)
access : read-write

NREF : bitfield NREF
bits : 16 - 22 (7 bit)
access : read-write

PREF : bitfield PREF
bits : 24 - 23 (0 bit)
access : read-write


PWRDWN

register PWRDWN
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWRDWN PWRDWN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PDC

PDC : bitfield PDC
bits : 0 - 14 (15 bit)
access : read-write


SDTIM

register SDTIM
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SDTIM SDTIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CL TRC TRP TRCD TRAS TREFC TDPL

CL : bitfield CL
bits : 0 - 0 (1 bit)
access : read-write

TRC : bitfield TRC
bits : 4 - 6 (3 bit)
access : read-write

TRP : bitfield TRP
bits : 8 - 10 (3 bit)
access : read-write

TRCD : bitfield TRCD
bits : 12 - 14 (3 bit)
access : read-write

TRAS : bitfield TRAS
bits : 16 - 18 (3 bit)
access : read-write

TREFC : bitfield TREFC
bits : 20 - 22 (3 bit)
access : read-write

TDPL : bitfield TDPL
bits : 24 - 24 (1 bit)
access : read-write


SDCMD

register SDCMD
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SDCMD SDCMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SDAD SDWE SDCAS SDRAS SDCS SDCKE PEND

SDAD : bitfield SDAD
bits : 0 - 14 (15 bit)
access : read-write

SDWE : bitfield SDWE
bits : 16 - 15 (0 bit)
access : read-write

SDCAS : bitfield SDCAS
bits : 17 - 16 (0 bit)
access : read-write

SDRAS : bitfield SDRAS
bits : 18 - 17 (0 bit)
access : read-write

SDCS : bitfield SDCS
bits : 19 - 18 (0 bit)
access : read-write

SDCKE : bitfield SDCKE
bits : 20 - 19 (0 bit)
access : read-write

PEND : bitfield PEND
bits : 31 - 30 (0 bit)
access : read-only


MODE5

register MODE5
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE5 MODE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MODE6

register MODE6
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE6 MODE6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MODE7

register MODE7
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE7 MODE7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIM0

register TIM0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM0 TIM0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RACC RADC FRADC RIDLC WACC WADC WWEC WIDLC

RACC : bitfield RACC
bits : 0 - 2 (3 bit)
access : read-write

RADC : bitfield RADC
bits : 4 - 6 (3 bit)
access : read-write

FRADC : bitfield FRADC
bits : 8 - 10 (3 bit)
access : read-write

RIDLC : bitfield RIDLC
bits : 12 - 14 (3 bit)
access : read-write

WACC : bitfield WACC
bits : 16 - 18 (3 bit)
access : read-write

WADC : bitfield WADC
bits : 20 - 22 (3 bit)
access : read-write

WWEC : bitfield WWEC
bits : 24 - 26 (3 bit)
access : read-write

WIDLC : bitfield WIDLC
bits : 28 - 30 (3 bit)
access : read-write


MEMCERR

register MEMCERR
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEMCERR MEMCERR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SFER SDER SFION SDION

SFER : bitfield SFER
bits : 0 - -1 (0 bit)
access : read-write

SDER : bitfield SDER
bits : 1 - 0 (0 bit)
access : read-write

SFION : bitfield SFION
bits : 2 - 1 (0 bit)
access : read-write

SDION : bitfield SDION
bits : 3 - 2 (0 bit)
access : read-write


TIM1

register TIM1
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM1 TIM1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIM2

register TIM2
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM2 TIM2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIM3

register TIM3
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM3 TIM3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIM4

register TIM4
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM4 TIM4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DCLKR

register DCLKR
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DCLKR DCLKR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MDIV MCLKON

MDIV : bitfield MDIV
bits : 0 - 2 (3 bit)
access : read-write

MCLKON : bitfield MCLKON
bits : 4 - 3 (0 bit)
access : read-write


EST

register EST
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EST EST read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WERR

WERR : bitfield WERR
bits : 0 - -1 (0 bit)
access : read-only


WEAD

register WEAD
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

WEAD WEAD read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : bitfield ADDR
bits : 0 - 30 (31 bit)
access : read-only


ESCLR

register ESCLR
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ESCLR ESCLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WERRCLR

WERRCLR : bitfield WERRCLR
bits : 0 - -1 (0 bit)
access : write-only


AMODE

register AMODE
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AMODE AMODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WAEN

WAEN : bitfield WAEN
bits : 0 - -1 (0 bit)
access : read-write


TIM5

register TIM5
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM5 TIM5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIM6

register TIM6
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM6 TIM6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIM7

register TIM7
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIM7 TIM7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MODE1

register MODE1
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE1 MODE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AREA0

register AREA0
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA0 AREA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


AREA1

register AREA1
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA1 AREA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


AREA2

register AREA2
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA2 AREA2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


AREA3

register AREA3
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA3 AREA3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


AREA4

register AREA4
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA4 AREA4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


AREA5

register AREA5
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA5 AREA5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


AREA6

register AREA6
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA6 AREA6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


AREA7

register AREA7
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREA7 AREA7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR MASK

ADDR : bitfield ADDR
bits : 0 - 6 (7 bit)
access : read-write

MASK : bitfield MASK
bits : 16 - 21 (6 bit)
access : read-write


ATIM0

register ATIM0
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM0 ATIM0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALC ALES ALEW

ALC : bitfield ALC
bits : 0 - 2 (3 bit)
access : read-write

ALES : bitfield ALES
bits : 4 - 6 (3 bit)
access : read-write

ALEW : bitfield ALEW
bits : 8 - 10 (3 bit)
access : read-write


ATIM1

register ATIM1
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM1 ATIM1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ATIM2

register ATIM2
address_offset : 0x68 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM2 ATIM2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ATIM3

register ATIM3
address_offset : 0x6C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM3 ATIM3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ATIM4

register ATIM4
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM4 ATIM4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ATIM5

register ATIM5
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM5 ATIM5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ATIM6

register ATIM6
address_offset : 0x78 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM6 ATIM6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ATIM7

register ATIM7
address_offset : 0x7C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ATIM7 ATIM7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MODE2

register MODE2
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE2 MODE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MODE3

register MODE3
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE3 MODE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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