\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
Dual Unit Mode Trigger Controller START Register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SWATRG : SWATRG
bits : 7 - 7 (1 bit)
access : write-only
Dual Unit Mode Trigger Controller START Register 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRGAEN : TRGAEN
bits : 0 - 0 (1 bit)
access : read-write
TRGASEL : TRGASEL
bits : 1 - 3 (3 bit)
access : read-write
TRGASTA : TRGASTA
bits : 4 - 4 (1 bit)
access : read-only
ADILV : ADILV
bits : 7 - 7 (1 bit)
access : read-write
Dual Unit Mode Trigger Controller START Register 3
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CORCNT : CORCNT
bits : 0 - 7 (8 bit)
access : read-write
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