\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
LVD-RESET Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LVDEN1 : LVDEN1
bits : 0 - 0 (1 bit)
access : read-write
LVDLVL1 : LVDLVL1
bits : 1 - 3 (3 bit)
access : read-write
LVDRSTEN : LVDRSTEN
bits : 5 - 5 (1 bit)
access : read-write
LVD-NMI Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LVDEN2 : LVDEN2
bits : 0 - 0 (1 bit)
access : read-write
LVDLVL2 : LVDLVL2
bits : 1 - 3 (3 bit)
access : read-write
INTSEL : INTSEL
bits : 4 - 4 (1 bit)
access : read-write
LVDINTEN : LVDINTEN
bits : 5 - 5 (1 bit)
access : read-write
LVD Status Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LVDST1 : LVDST1
bits : 0 - 0 (1 bit)
access : read-write
LVDST2 : LVDST2
bits : 1 - 1 (1 bit)
access : read-write
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