\n

LVD

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

Registers

RCR

ICR

SR


RCR

LVD-RESET Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RCR RCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LVDEN1 LVDLVL1 LVDRSTEN

LVDEN1 : LVDEN1
bits : 0 - 0 (1 bit)
access : read-write

LVDLVL1 : LVDLVL1
bits : 1 - 3 (3 bit)
access : read-write

LVDRSTEN : LVDRSTEN
bits : 5 - 5 (1 bit)
access : read-write


ICR

LVD-NMI Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICR ICR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LVDEN2 LVDLVL2 INTSEL LVDINTEN

LVDEN2 : LVDEN2
bits : 0 - 0 (1 bit)
access : read-write

LVDLVL2 : LVDLVL2
bits : 1 - 3 (3 bit)
access : read-write

INTSEL : INTSEL
bits : 4 - 4 (1 bit)
access : read-write

LVDINTEN : LVDINTEN
bits : 5 - 5 (1 bit)
access : read-write


SR

LVD Status Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SR SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LVDST1 LVDST2

LVDST1 : LVDST1
bits : 0 - 0 (1 bit)
access : read-write

LVDST2 : LVDST2
bits : 1 - 1 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.