\n
address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0xA4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xB0 Bytes (0x0)
size : 0x280 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x330 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
UDC2 Address State
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DEV_ADR : DEV_ADR
bits : 0 - 6 (7 bit)
access : read-write
DEFAULT : DEFAULT
bits : 8 - 8 (1 bit)
access : read-write
ADDRESSED : ADDRESSED
bits : 9 - 9 (1 bit)
access : read-write
CONFIGURED : CONFIGURED
bits : 10 - 10 (1 bit)
access : read-write
SUSPEND : SUSPEND
bits : 11 - 11 (1 bit)
access : read-only
CUR_SPEED : CUR_SPEED
bits : 12 - 13 (2 bit)
access : read-only
EP_BI_MODE : EP_BI_MODE
bits : 14 - 14 (1 bit)
access : read-write
STAGE_ERR : STAGE_ERR
bits : 15 - 15 (1 bit)
access : read-write
UDC2 bRequest-bmRequest Type
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RECIPIENT : RECIPIENT
bits : 0 - 4 (5 bit)
access : read-only
REQ_TYPE : REQ_TYPE
bits : 5 - 6 (2 bit)
access : read-only
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-only
REQUESET : REQUESET
bits : 8 - 15 (8 bit)
access : read-only
UDC2 wValue
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VALUE : VALUE
bits : 0 - 15 (16 bit)
access : read-only
UDC2 wIndex
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INDEX : INDEX
bits : 0 - 15 (16 bit)
access : read-only
UDC2 wLength
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
LENGTH : LENGTH
bits : 0 - 15 (16 bit)
access : read-only
UDC2 INT
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I_SETUP : I_SETUP
bits : 0 - 0 (1 bit)
access : read-write
I_STATUS_NAK : I_STATUS_NAK
bits : 1 - 1 (1 bit)
access : read-write
I_STATUS : I_STATUS
bits : 2 - 2 (1 bit)
access : read-write
I_RX_DATA0 : I_RX_DATA0
bits : 3 - 3 (1 bit)
access : read-write
I_SOF : I_SOF
bits : 4 - 4 (1 bit)
access : read-write
I_EP0 : I_EP0
bits : 5 - 5 (1 bit)
access : read-write
I_EP : I_EP
bits : 6 - 6 (1 bit)
access : read-write
I_NAK : I_NAK
bits : 7 - 7 (1 bit)
access : read-write
M_SETUP : M_SETUP
bits : 8 - 8 (1 bit)
access : read-write
M_STATUS_NAK : M_STATUS_NAK
bits : 9 - 9 (1 bit)
access : read-write
M_STATUS : M_STATUS
bits : 10 - 10 (1 bit)
access : read-write
M_RX_DATA0 : M_RX_DATA0
bits : 11 - 11 (1 bit)
access : read-write
M_SOF : M_SOF
bits : 12 - 12 (1 bit)
access : read-write
M_EP0 : M_EP0
bits : 13 - 13 (1 bit)
access : read-write
M_EP : M_EP
bits : 14 - 14 (1 bit)
access : read-write
M_NAK : M_NAK
bits : 15 - 15 (1 bit)
access : read-write
UDC2 INT_EP
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I_EP1 : I_EP1
bits : 1 - 1 (1 bit)
access : read-write
I_EP2 : I_EP2
bits : 2 - 2 (1 bit)
access : read-write
I_EP3 : I_EP3
bits : 3 - 3 (1 bit)
access : read-write
I_EP4 : I_EP4
bits : 4 - 4 (1 bit)
access : read-write
I_EP5 : I_EP5
bits : 5 - 5 (1 bit)
access : read-write
I_EP6 : I_EP6
bits : 6 - 6 (1 bit)
access : read-write
I_EP7 : I_EP7
bits : 7 - 7 (1 bit)
access : read-write
UDC2 INT_EP_MASK
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
M_EP : M_EP
bits : 0 - 7 (8 bit)
access : read-write
UDC2 INT RX DATA0
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RX_D0_EP : RX_D0_EP
bits : 0 - 7 (8 bit)
access : read-write
UDC2 EP0 Max Packet Size
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 6 (7 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC2 INT NAK
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I_EP1 : I_EP1
bits : 1 - 1 (1 bit)
access : read-write
I_EP2 : I_EP2
bits : 2 - 2 (1 bit)
access : read-write
I_EP3 : I_EP3
bits : 3 - 3 (1 bit)
access : read-write
I_EP4 : I_EP4
bits : 4 - 4 (1 bit)
access : read-write
I_EP5 : I_EP5
bits : 5 - 5 (1 bit)
access : read-write
I_EP6 : I_EP6
bits : 6 - 6 (1 bit)
access : read-write
I_EP7 : I_EP7
bits : 7 - 7 (1 bit)
access : read-write
UDC2 INT NAK MASK
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
M_EP1 : M_EP1
bits : 1 - 1 (1 bit)
access : read-write
M_EP2 : M_EP2
bits : 2 - 2 (1 bit)
access : read-write
M_EP3 : M_EP3
bits : 3 - 3 (1 bit)
access : read-write
M_EP4 : M_EP4
bits : 4 - 4 (1 bit)
access : read-write
M_EP5 : M_EP5
bits : 5 - 5 (1 bit)
access : read-write
M_EP6 : M_EP6
bits : 6 - 6 (1 bit)
access : read-write
M_EP7 : M_EP7
bits : 7 - 7 (1 bit)
access : read-write
UDC2 EP0 Status
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
EP0_MASK : EP0_MASK
bits : 15 - 15 (1 bit)
access : read-only
UDC2 EP0 Data Size
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 6 (7 bit)
access : read-only
UDC2 EP0 FIFO
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC2 Frame
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FRAME : FRAME
bits : 0 - 10 (11 bit)
access : read-only
F_STATUS : F_STATUS
bits : 12 - 13 (2 bit)
access : read-only
CREATE_SOF : CREATE_SOF
bits : 15 - 15 (1 bit)
access : read-write
UDC2 EP1 Max Packet Size
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 10 (11 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC2 EP1 Status
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_MF : NUM_MF
bits : 0 - 1 (2 bit)
access : read-write
T_TYPE : T_TYPE
bits : 2 - 3 (2 bit)
access : read-write
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-write
DISABLE : DISABLE
bits : 8 - 8 (1 bit)
access : read-only
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
BUS_SEL : BUS_SEL
bits : 14 - 14 (1 bit)
access : read-write
PKT_MODE : PKT_MODE
bits : 15 - 15 (1 bit)
access : read-write
UDC2 EP1 Data Size
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 10 (11 bit)
access : read-only
UDC2 EP1 FIFO
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC2 EP2 Max Packet Size
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 10 (11 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC2 EP2 Status
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_MF : NUM_MF
bits : 0 - 1 (2 bit)
access : read-write
T_TYPE : T_TYPE
bits : 2 - 3 (2 bit)
access : read-write
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-write
DISABLE : DISABLE
bits : 8 - 8 (1 bit)
access : read-only
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
BUS_SEL : BUS_SEL
bits : 14 - 14 (1 bit)
access : read-write
PKT_MODE : PKT_MODE
bits : 15 - 15 (1 bit)
access : read-write
UDC2 EP2 Data Size
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 10 (11 bit)
access : read-only
UDC2 EP2 FIFO
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC3 EP3 Max Packet Size
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 10 (11 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC3 EP3 Status
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_MF : NUM_MF
bits : 0 - 1 (2 bit)
access : read-write
T_TYPE : T_TYPE
bits : 2 - 3 (2 bit)
access : read-write
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-write
DISABLE : DISABLE
bits : 8 - 8 (1 bit)
access : read-only
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
BUS_SEL : BUS_SEL
bits : 14 - 14 (1 bit)
access : read-write
PKT_MODE : PKT_MODE
bits : 15 - 15 (1 bit)
access : read-write
UDC3 EP3 Data Size
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 10 (11 bit)
access : read-only
UDC3 EP3 FIFO
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC2 EP4 Max Packet Size
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 10 (11 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC2 EP4 Status
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_MF : NUM_MF
bits : 0 - 1 (2 bit)
access : read-write
T_TYPE : T_TYPE
bits : 2 - 3 (2 bit)
access : read-write
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-write
DISABLE : DISABLE
bits : 8 - 8 (1 bit)
access : read-only
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
BUS_SEL : BUS_SEL
bits : 14 - 14 (1 bit)
access : read-write
PKT_MODE : PKT_MODE
bits : 15 - 15 (1 bit)
access : read-write
UDC2 EP4 Data Size
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 10 (11 bit)
access : read-only
UDC2 EP4 FIFO
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC2 EP5 Max Packet Size
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 10 (11 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC2 EP5 Status
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_MF : NUM_MF
bits : 0 - 1 (2 bit)
access : read-write
T_TYPE : T_TYPE
bits : 2 - 3 (2 bit)
access : read-write
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-write
DISABLE : DISABLE
bits : 8 - 8 (1 bit)
access : read-only
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
BUS_SEL : BUS_SEL
bits : 14 - 14 (1 bit)
access : read-write
PKT_MODE : PKT_MODE
bits : 15 - 15 (1 bit)
access : read-write
UDC2 EP5 Data Size
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 10 (11 bit)
access : read-only
UDC2 EP5 FIFO
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC2 EP6 Max Packet Size
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 10 (11 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC2 EP6 Status
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_MF : NUM_MF
bits : 0 - 1 (2 bit)
access : read-write
T_TYPE : T_TYPE
bits : 2 - 3 (2 bit)
access : read-write
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-write
DISABLE : DISABLE
bits : 8 - 8 (1 bit)
access : read-only
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
BUS_SEL : BUS_SEL
bits : 14 - 14 (1 bit)
access : read-write
PKT_MODE : PKT_MODE
bits : 15 - 15 (1 bit)
access : read-write
UDC2 EP6 Data Size
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 10 (11 bit)
access : read-only
UDC2 EP6 FIFO
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC2 EP7 Max Packet Size
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAX_PKT : MAX_PKT
bits : 0 - 10 (11 bit)
access : read-write
DSET : DSET
bits : 12 - 12 (1 bit)
access : read-only
TX_0DATA : TX_0DATA
bits : 15 - 15 (1 bit)
access : read-only
UDC2 EP7 Status
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_MF : NUM_MF
bits : 0 - 1 (2 bit)
access : read-write
T_TYPE : T_TYPE
bits : 2 - 3 (2 bit)
access : read-write
DIR : DIR
bits : 7 - 7 (1 bit)
access : read-write
DISABLE : DISABLE
bits : 8 - 8 (1 bit)
access : read-only
STATUS : STATUS
bits : 9 - 11 (3 bit)
access : read-only
TOGGLE : TOGGLE
bits : 12 - 13 (2 bit)
access : read-only
BUS_SEL : BUS_SEL
bits : 14 - 14 (1 bit)
access : read-write
PKT_MODE : PKT_MODE
bits : 15 - 15 (1 bit)
access : read-write
UDC2 EP7 Data Size
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SIZE : SIZE
bits : 0 - 10 (11 bit)
access : read-only
UDC2 EP7 FIFO
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : DATA
bits : 0 - 15 (16 bit)
access : read-write
UDC2 Command
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COM : COM
bits : 0 - 3 (4 bit)
access : read-write
EP : EP
bits : 4 - 7 (4 bit)
access : read-write
RX_NULLPKT_EP : RX_NULLPKT_EP
bits : 8 - 11 (4 bit)
access : read-only
INT_TOGGLE : INT_TOGGLE
bits : 15 - 15 (1 bit)
access : read-write
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