\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x10 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x18 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x14 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
CAN Mailbox Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ID : ID
bits : 0 - 28 (29 bit)
access : read-write
RFH : RFH
bits : 29 - 29 (1 bit)
access : read-write
LAME : LAME
bits : 30 - 30 (1 bit)
access : read-write
IDE : IDE
bits : 31 - 31 (1 bit)
access : read-write
CAN Mailbox Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
D0 : D0
bits : 0 - 7 (8 bit)
access : read-write
D1 : D1
bits : 8 - 15 (8 bit)
access : read-write
D2 : D2
bits : 16 - 23 (8 bit)
access : read-write
D3 : D3
bits : 24 - 31 (8 bit)
access : read-write
CAN Mailbox Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
D4 : D4
bits : 0 - 7 (8 bit)
access : read-write
D5 : D5
bits : 8 - 15 (8 bit)
access : read-write
D6 : D6
bits : 16 - 23 (8 bit)
access : read-write
D7 : D7
bits : 24 - 31 (8 bit)
access : read-write
CAN Mailbox Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DLC : DLC
bits : 0 - 3 (4 bit)
access : read-write
RTR : RTR
bits : 4 - 4 (1 bit)
access : read-write
TSV : TSV
bits : 16 - 31 (16 bit)
access : read-write
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