\n
address_offset : 0x0 Bytes (0x0)
    size : 0x1000 byte (0x0)
    mem_usage : registers
    protection : not protected
    
    FLASH Lock Register
    address_offset : 0x0 Bytes (0x0)
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
    FLASH page erase register
    address_offset : 0x14 Bytes (0x0)
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
    SWD access status
    address_offset : 0x24 Bytes (0x0)
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
    FLASH Wait State Register
    address_offset : 0x28 Bytes (0x0)
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
WSTATE : FLASH access wait state
    bits : 0 - 0 (1 bit)
 Enumeration: 
 1 : 1 
    
 1 FLASH wait states 
 2 : 2 
    
 2 FLASH wait states 
 3 : 3 
    
 3 FLASH wait states 
 0 : 0 
    
 0 FLASH wait states 
End of enumeration elements list.
    FLASH Buffered Write Data
    address_offset : 0x2C Bytes (0x0)
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
    FLASH Status Register
    address_offset : 0x4 Bytes (0x0)
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
WRITE : Buffered Write Active
    bits : 0 - -1 (0 bit)
 Enumeration: 
 1 : active 
    
 Buffered write active 
 0 : inactive 
    
 Buffered write inactive 
End of enumeration elements list.
PERASE : Page Erase Active
    bits : 1 - 0 (0 bit)
 Enumeration: 
 1 : active 
    
 Page erase in progress 
 0 : inactive 
    
 Page erase finished or no page erase in progress 
End of enumeration elements list.
    FLASH page select register
    address_offset : 0x8 Bytes (0x0)
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
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