Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Watchdog Timer Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDTCTRRST : Watchdog Timer Counter Reset
bits : 0 - 1 (2 bit)
Enumeration:
5 : key
WDTCTL Reset Key
End of enumeration elements list.
WDTINTEN : Watchdog Interval Timer Interrupt Enable
bits : 3 - 2 (0 bit)
Enumeration:
1 : enabled
Watchdog timer interval interrupt enabled
0 : disabled
Watchdog timer interval interrupt disabled
End of enumeration elements list.
WDTINT : Watchdog Interval Timer Interrupt Flag
bits : 4 - 3 (0 bit)
access : read-only
Enumeration:
1 : set
Watchdog timer interrupt flag set
0 : clear
Watchdog timer interrupt flag clear
End of enumeration elements list.
WDTRESETEN : Watchdog Timer Device Reset Enable
bits : 5 - 4 (0 bit)
Enumeration:
1 : enabled
Watchdog timer device reset enabled
0 : disabled
Watchdog timer device reset disabled
End of enumeration elements list.
WDTCLKDIV : Watchdog Timer Input Clock Divider
bits : 6 - 8 (3 bit)
Enumeration:
1 : /4
WDT clock divider: /4
2 : /8
WDT clock divider: /8
3 : /16
WDT clock divider: /16
4 : /32
WDT clock divider: /32
5 : /64
WDT clock divider: /64
6 : /128
WDT clock divider: /128
7 : /256
WDT clock divider: /256
8 : /512
WDT clock divider: /512
9 : /1024
WDT clock divider: /1024
10 : /2048
WDT clock divider: /2048
11 : /4096
WDT clock divider: /4096
12 : /8192
WDT clock divider: /8192
13 : /16384
WDT clock divider: /16384
14 : /32768
WDT clock divider: /32768
15 : /65536
WDT clock divider: /65536
0 : /2
WDT clock divider: /2
End of enumeration elements list.
WDTCLKSEL : Watchdog Timer Input Clock Select
bits : 10 - 9 (0 bit)
Enumeration:
1 : FCLK
Watchdog timer input clock: FCLK
0 : FRCLK
Watchdog timer input clock: FRCLK
End of enumeration elements list.
WRBUSY : WDT register write busy
bits : 11 - 10 (0 bit)
access : read-only
Enumeration:
1 : busy
Watchdog timer register write busy
0 : not busy
Watchdog timer register write not busy
End of enumeration elements list.
KEY : WDTCTL register key
bits : 24 - 30 (7 bit)
Watchdog Timer Count-down Value Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSTVALUE : 24b WDT count-down value
bits : 0 - 22 (23 bit)
KEY : WDTCTL register key
bits : 24 - 30 (7 bit)
Watchdog Timer Counter Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
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