\n

ADC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

EMUXCTL

ADCINT

AS1CTL

AS1S0

AS1R0

AS1S1

AS1R1

AS1S2

AS1R2

AS1S3

AS1R3

AS1S4

AS1R4

AS1S5

AS1R5

AS1S6

AS1R6

AS1S7

AS1R7

EMUXDATA

AS0CTL

AS0S0

AS0R0

AS0S1

AS0R1

AS0S2

AS0R2

AS0S3

AS0R3

AS0S4

AS0R4

AS0S5

AS0R5

AS0S6

AS0R6

AS0S7

ADCCTL

AS0R7

ADCCR


EMUXCTL

ADC External MUX control register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EMUXCTL EMUXCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EMUXCDIV EMUXDONE EMUXBUSY EMUXC

EMUXCDIV : ADC External MUX clock to FCLK divider
bits : 0 - 1 (2 bit)

Enumeration:

0 : FCLK /1

FCLK dvided by 1

1 : FCLK /2

FCLK dvided by 2

2 : FCLK /3

FCLK dvided by 3

3 : FCLK /4

FCLK dvided by 4

4 : FCLK /5

FCLK dvided by 5

5 : FCLK /6

FCLK dvided by 6

6 : FCLK /7

FCLK dvided by 7

7 : FCLK /8

FCLK dvided by 8

End of enumeration elements list.

EMUXDONE : ADC External MUX data send done
bits : 3 - 2 (0 bit)

Enumeration:

0 : busy

ADC External MUX busy

1 : data sent

ADC External MUX data sent

End of enumeration elements list.

EMUXBUSY : ADC External MUX status
bits : 4 - 3 (0 bit)

Enumeration:

0 : busy

ADC External MUX busy

1 : not busy

ADC External MUX not busy

End of enumeration elements list.

EMUXC : ADC External MUX control
bits : 5 - 4 (0 bit)

Enumeration:

0 : manual

ADC External MUX manual control

1 : auto

ADC External MUX controlled by auto-sequencer unit

End of enumeration elements list.


ADCINT

ADC interrupt register
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCINT ADCINT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCINT EMUXINT AS0INT AS1INT ASCINT ADCINT_EN EMUXINT_EN AS0INT_EN AS1INT_EN ASCINT_EN ASCINTSEQ ASCINTTR

ADCINT : ADC conversion finished interrupt
bits : 0 - -1 (0 bit)

Enumeration:

0 : none

no interrupt

1 : interrupt

interrupt, write 1b to clear

End of enumeration elements list.

EMUXINT : EMUX data transfer finished interrupt
bits : 1 - 0 (0 bit)

Enumeration:

0 : none

no interrupt

1 : interrupt

interrupt, write 1b to clear

End of enumeration elements list.

AS0INT : Auto sequencer 0 conversions finished interrupt
bits : 2 - 1 (0 bit)

Enumeration:

0 : none

no interrupt

1 : interrupt

interrupt, write 1b to clear

End of enumeration elements list.

AS1INT : Auto sequencer 1 conversions finished interrupt
bits : 3 - 2 (0 bit)

Enumeration:

0 : none

no interrupt

1 : interrupt

interrupt, write 1b to clear

End of enumeration elements list.

ASCINT : Auto sequencer collision interrupt
bits : 4 - 3 (0 bit)

Enumeration:

0 : none

no interrupt

1 : interrupt

interrupt, write 1b to clear

End of enumeration elements list.

ADCINT_EN : ADC conversion finished interrupt enabled
bits : 8 - 7 (0 bit)

Enumeration:

0 : disabled

interrupt disabled

1 : enabled

interrupt enabled

End of enumeration elements list.

EMUXINT_EN : EMUX transfer finished interrupt enabled
bits : 9 - 8 (0 bit)

Enumeration:

0 : disabled

interrupt disabled

1 : enabled

interrupt enabled

End of enumeration elements list.

AS0INT_EN : Enable auto sequencer 0 conversions finished interrupt
bits : 10 - 9 (0 bit)

Enumeration:

0 : disabled

interrupt disabled

1 : enabled

interrupt enabled

End of enumeration elements list.

AS1INT_EN : Enable auto sequencer 1 conversions finished interrupt
bits : 11 - 10 (0 bit)

Enumeration:

0 : disabled

interrupt disabled

1 : enabled

interrupt enabled

End of enumeration elements list.

ASCINT_EN : Enable auto sequencer collision interrupt
bits : 12 - 11 (0 bit)

Enumeration:

0 : disabled

interrupt disabled

1 : enabled

interrupt enabled

End of enumeration elements list.

ASCINTSEQ : Last auto sequencer to trigger ADCINT.ASCINT
bits : 16 - 16 (1 bit)

Enumeration:

0 : none

no trigger

1 : AS0

auto sequencer 0 triggered interrupt

2 : AS1

Auto sequencer 1 triggered interrupt

3 : both

Both auto sequencer 0 and 1 triggered interrupt

End of enumeration elements list.

ASCINTTR : Last auto sequencer to run
bits : 18 - 18 (1 bit)

Enumeration:

0 : none

no sequencer ran

1 : AS0

auto sequencer 0 last ran

2 : AS1

Auto sequencer 1 last ran

End of enumeration elements list.


AS1CTL

Auto sequencer 1 control register
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1CTL AS1CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ASAxTRPWM ASAxTRTMR ASxTRE ASxTR ASxD ASxEN ASxBUSY

ASAxTRPWM : Auto sequencer PWM trigger source
bits : 0 - 2 (3 bit)

Enumeration:

0 : PWMA0

PWMA0

1 : PWMA1

PWMA1

2 : PWMA2

PWMA2

3 : PWMA3

PWMA3

4 : PWMA4

PWMA4

5 : PWMA5

PWMA5

6 : PWMA6

PWMA6

7 : PWMA7

PWMA7

8 : PWMB0

PWMB0

9 : PWMB1

PWMB1

10 : PWMC0

PWMC0

11 : PWMC1

PWMC1

12 : PWMD0

PWMD0

13 : PWMD1

PWMD1

End of enumeration elements list.

ASAxTRTMR : Auto sequencer timer trigger source
bits : 4 - 4 (1 bit)

Enumeration:

0 : Timer A

Timer A

1 : Timer B

Timer B

2 : Timer C

Timer C

3 : Timer D

Timer D

End of enumeration elements list.

ASxTRE : Auto sequencer trigger source ASxCTL.ASxTR edge
bits : 6 - 5 (0 bit)

Enumeration:

0 : highToLow

High to low edge

1 : lowToHigh

Low to high edge

End of enumeration elements list.

ASxTR : Auto sequencer trigger source
bits : 7 - 6 (0 bit)

Enumeration:

0 : PWM

PWM, as defined by ASxCTL.ASxTRPWM

1 : Timer

Timer, as defined by ASxCTL.ASxTRTMR

End of enumeration elements list.

ASxD : Auto sequencer sampling depth
bits : 8 - 9 (2 bit)

Enumeration:

0 : 1

1 sample

1 : 2

2 samples

2 : 3

3 samples

3 : 4

4 samples

4 : 5

5 samples

5 : 6

6 samples

6 : 7

7 samples

7 : 8

8 samples

End of enumeration elements list.

ASxEN : Auto sequencer enabled
bits : 11 - 10 (0 bit)

Enumeration:

0 : disabled

auto sequencer disabled

1 : enabled

auto sequencer enabled

End of enumeration elements list.

ASxBUSY : Auto sequencer busy
bits : 12 - 11 (0 bit)

Enumeration:

0 : not busy

auto sequencer not active

1 : busy

auto sequencer sampling active

End of enumeration elements list.


AS1S0

Auto sequencer 1 sample 0 control register
address_offset : 0x104 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S0 AS1S0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EMUXD EMUXS DELAY ADCMUX

EMUXD : EMUXD
bits : 0 - 6 (7 bit)

EMUXS : EMUX transmission start
bits : 8 - 8 (1 bit)

Enumeration:

0 : none

Do not send data

1 : before

Send EMUXD data at beginning of this sample sequence

2 : end

Send EMUXD data after S/H of ADC

End of enumeration elements list.

DELAY : Delay between start of sample sequence and start of ADC conversion in input clocks
bits : 10 - 10 (1 bit)

Enumeration:

0 : 0

0 ADC input clocks

1 : 4

4 ADC input clocks

2 : 8

8 ADC input clocks

3 : 16

16 ADC input clocks

End of enumeration elements list.

ADCMUX : ADC MUX input select
bits : 12 - 13 (2 bit)

Enumeration:

0 : EMUX

EMUX

2 : AD2

AD2

3 : AD3

AD3

4 : AD4

AD4

5 : AD5

AD5

7 : VSSA

VSSA

End of enumeration elements list.


AS1R0

Auto sequencer 1 sample 0 result register
address_offset : 0x108 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R0 AS1R0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCRESULT

ADCRESULT : ADC conversion result
bits : 0 - 8 (9 bit)


AS1S1

Auto sequencer 1 sample 1 control register
address_offset : 0x10C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S1 AS1S1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1R1

Auto sequencer 1 sample 1 result register
address_offset : 0x110 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R1 AS1R1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1S2

Auto sequencer 1 sample 2 control register
address_offset : 0x114 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S2 AS1S2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1R2

Auto sequencer 1 sample 2 result register
address_offset : 0x118 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R2 AS1R2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1S3

Auto sequencer 1 sample 3 control register
address_offset : 0x11C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S3 AS1S3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1R3

Auto sequencer 1 sample 3 result register
address_offset : 0x120 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R3 AS1R3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1S4

Auto sequencer 1 sample 4 control register
address_offset : 0x124 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S4 AS1S4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1R4

Auto sequencer 1 sample 4 result register
address_offset : 0x128 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R4 AS1R4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1S5

Auto sequencer 1 sample 5 control register
address_offset : 0x12C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S5 AS1S5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1R5

Auto sequencer 1 sample 5 result register
address_offset : 0x130 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R5 AS1R5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1S6

Auto sequencer 1 sample 6 control register
address_offset : 0x134 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S6 AS1S6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1R6

Auto sequencer 1 sample 6 result register
address_offset : 0x138 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R6 AS1R6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1S7

Auto sequencer 1 sample 7 control register
address_offset : 0x13C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1S7 AS1S7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS1R7

Auto sequencer 1 sample 7 result register
address_offset : 0x140 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS1R7 AS1R7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

EMUXDATA

ADC External MUX data register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EMUXDATA EMUXDATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : ADC External MUX data register
bits : 0 - 14 (15 bit)


AS0CTL

Auto sequencer 0 control register
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0CTL AS0CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ASAxTRPWM ASAxTRTMR ASxTRE ASxTR ASxD ASxEN ASxBUSY

ASAxTRPWM : Auto sequencer PWM trigger source
bits : 0 - 2 (3 bit)

Enumeration:

0 : PWMA0

PWMA0 Trigger

1 : PWMA1

PWMA1 Trigger

2 : PWMA2

PWMA2 Trigger

3 : PWMA3

PWMA3 Trigger

4 : PWMA4

PWMA4 Trigger

5 : PWMA5

PWMA5 Trigger

6 : PWMA6

PWMA6 Trigger

7 : PWMA7

PWMA7 Trigger

8 : PWMB0

PWMB0

9 : PWMB1

PWMB1

10 : PWMC0

PWMC0

11 : PWMC1

PWMC1

12 : PWMD0

PWMD0

13 : PWMD1

PWMD1

End of enumeration elements list.

ASAxTRTMR : Auto sequencer timer trigger source
bits : 4 - 4 (1 bit)

Enumeration:

0 : Timer A

Timer A

1 : Timer B

Timer B

2 : Timer C

Timer C

3 : Timer D

Timer D

End of enumeration elements list.

ASxTRE : Auto sequencer trigger source ASxCTL.ASxTR edge
bits : 6 - 5 (0 bit)

Enumeration:

0 : highToLow

High to low edge

1 : lowToHigh

Low to high edge

End of enumeration elements list.

ASxTR : Auto sequencer trigger source
bits : 7 - 6 (0 bit)

Enumeration:

0 : PWM

PWM, as defined by ASxCTL.ASxTRPWM

1 : Timer

Timer, as defined by ASxCTL.ASxTRTMR

End of enumeration elements list.

ASxD : Auto sequencer sampling depth
bits : 8 - 9 (2 bit)

Enumeration:

0 : 1

1 sample

1 : 2

2 samples

2 : 3

3 samples

3 : 4

4 samples

4 : 5

5 samples

5 : 6

6 samples

6 : 7

7 samples

7 : 8

8 samples

End of enumeration elements list.

ASxEN : Auto sequencer enabled
bits : 11 - 10 (0 bit)

Enumeration:

0 : disabled

auto sequencer disabled

1 : enabled

auto sequencer enabled

End of enumeration elements list.

ASxBUSY : Auto sequencer busy
bits : 12 - 11 (0 bit)

Enumeration:

0 : not busy

auto sequencer not active

1 : busy

auto sequencer sampling active

End of enumeration elements list.


AS0S0

Auto sequencer 0 sample 0 control register
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S0 AS0S0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EMUXD EMUXS DELAY ADCMUX

EMUXD : EMUXD
bits : 0 - 6 (7 bit)

EMUXS : EMUX transmission start
bits : 8 - 8 (1 bit)

Enumeration:

0 : none

Do not send data

1 : before

Send EMUXD data at beginning of this sample sequence

2 : end

Send EMUXD data after S/H of ADC

End of enumeration elements list.

DELAY : Delay between start of sample sequence and start of ADC conversion in input clocks
bits : 10 - 10 (1 bit)

Enumeration:

0 : 0

0 ADC input clocks

1 : 4

4 ADC input clocks

2 : 8

8 ADC input clocks

3 : 16

16 ADC input clocks

End of enumeration elements list.

ADCMUX : ADC MUX input select
bits : 12 - 13 (2 bit)

Enumeration:

0 : EMUX

EMUX

2 : AD2

AD2

3 : AD3

AD3

4 : AD4

AD4

5 : AD5

AD5

7 : VSSA

VSSA

End of enumeration elements list.


AS0R0

Auto sequencer 0 sample 0 result register
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R0 AS0R0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCRESULT

ADCRESULT : ADC conversion result
bits : 0 - 8 (9 bit)


AS0S1

Auto sequencer 0 sample 1 control register
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S1 AS0S1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0R1

Auto sequencer 0 sample 1 result register
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R1 AS0R1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0S2

Auto sequencer 0 sample 2 control register
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S2 AS0S2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0R2

Auto sequencer 0 sample 2 result register
address_offset : 0x58 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R2 AS0R2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0S3

Auto sequencer 0 sample 3 control register
address_offset : 0x5C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S3 AS0S3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0R3

Auto sequencer 0 sample 3 result register
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R3 AS0R3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0S4

Auto sequencer 0 sample 4 control register
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S4 AS0S4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0R4

Auto sequencer 0 sample 4 result register
address_offset : 0x68 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R4 AS0R4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0S5

Auto sequencer 0 sample 5 control register
address_offset : 0x6C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S5 AS0S5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0R5

Auto sequencer 0 sample 5 result register
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R5 AS0R5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0S6

Auto sequencer 0 sample 6 control register
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S6 AS0S6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0R6

Auto sequencer 0 sample 6 result register
address_offset : 0x78 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R6 AS0R6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

AS0S7

Auto sequencer 0 sample 7 control register
address_offset : 0x7C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0S7 AS0S7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCTL

ADC control register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCCTL ADCCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCCDIV ADCMUX ADCBUSY ADCMODE ADCSTART ADCEN

ADCCDIV : ADC input clock FCLK divider
bits : 0 - 1 (2 bit)

Enumeration:

0 : FCLK /1

FCLK divided by 1

1 : FCLK /2

FCLK divided by 2

2 : FCLK /3

FCLK divided by 3

3 : FCLK /4

FCLK divided by 4

4 : FCLK /5

FCLK divided by 5

5 : FCLK /6

FCLK divided by 6

6 : FCLK /7

FCLK divided by 7

7 : FCLK /8

FCLK divided by 8

End of enumeration elements list.

ADCMUX : ADC MUX input select
bits : 4 - 5 (2 bit)

Enumeration:

0 : AD0

AD0 input

2 : AD2

AD2 input

3 : AD3

AD3 input

4 : AD4

AD4 input

5 : AD5

AD5 input

7 : VSSA

VSSA input

End of enumeration elements list.

ADCBUSY : ADC busy
bits : 7 - 6 (0 bit)
access : read-only

Enumeration:

0 : no operation

ADC not busy

1 : busy

ADC conversion or auto sequencer active

End of enumeration elements list.

ADCMODE : ADC conversion mode
bits : 10 - 11 (2 bit)

Enumeration:

0 : single

single channel

1 : AUTO0

automated sequence 0 only

2 : AUTO1

automated sequencer 1 only

3 : AUTO01

automated sequencer 0 and 1 daisy chained

4 : AUTO0TRIG

automated sequencer 0 only trigger condition

5 : AUTO1TRIG

automated sequencer 1 only trigger condition

6 : AUTO01TRIG

automated sequencer 0 and 1 daisy chained trigger

7 : AUTO01TRIGIND

automated sequencer 0 and 1 independently triggered

End of enumeration elements list.

ADCSTART : Start ADC Conversion
bits : 14 - 13 (0 bit)

Enumeration:

0 : stop

stop ADC conversion

1 : start

start ADC conversion

End of enumeration elements list.

ADCEN : ADC Module Enable
bits : 15 - 14 (0 bit)

Enumeration:

0 : disabled

turn off ADC module

1 : enabled

enable ADC module

End of enumeration elements list.


AS0R7

Auto sequencer 0 sample 7 result register
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AS0R7 AS0R7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

ADCCR

ADC conversion result register
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ADCCR ADCCR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCRESULT

ADCRESULT : ADC conversion result
bits : 0 - 14 (15 bit)



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.