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address_offset : 0x0 Bytes (0x0)
size : 0x10000 byte (0x0)
mem_usage : registers
protection : not protected
Combined CAN MR, CMR, SR, and ISR registers
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MR : CAN Mode
bits : 0 - 6 (7 bit)
CMR : CAN Command
bits : 8 - 14 (7 bit)
SR : CAN Status
bits : 16 - 22 (7 bit)
ISR : CAN Interrupt Status/Acknowledge
bits : 24 - 30 (7 bit)
Combined CAN Acceptance Code registers
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACR0 : CAN Acceptance Code 0
bits : 0 - 6 (7 bit)
ACR1 : CAN Acceptance Code 1
bits : 8 - 14 (7 bit)
ACR2 : CAN Acceptance Code 2
bits : 16 - 22 (7 bit)
ACR3 : CAN Acceptance Code 3
bits : 24 - 30 (7 bit)
Combined CAN Acceptance Mask registers
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMR0 : CAN Acceptance Mask 0
bits : 0 - 6 (7 bit)
AMR1 : CAN Acceptance Mask 1
bits : 8 - 14 (7 bit)
AMR2 : CAN Acceptance Mask 2
bits : 16 - 22 (7 bit)
AMR3 : CAN Acceptance Mask 3
bits : 24 - 30 (7 bit)
Combined CAN ECC, RXERR, TXERR, and ALC registers
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECC : CAN Error Code Capture
bits : 0 - 6 (7 bit)
RXERR : CAN RX Error Counter
bits : 8 - 14 (7 bit)
TXERR : CAN TX Error Counter
bits : 16 - 22 (7 bit)
ALC : CAN Arbitration Lost Code Capture
bits : 24 - 30 (7 bit)
Combined CAN IMR, RMC, BTR0, and BTR1 registers
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IMR : CAN Interrupt Mask
bits : 0 - 6 (7 bit)
RMC : CAN Receive Message Counter
bits : 8 - 14 (7 bit)
BTR0 : CAN Bus Timing Register 0
bits : 16 - 22 (7 bit)
BTR1 : CAN Bus Timing Register 1
bits : 24 - 30 (7 bit)
Combined CAN Transmit Buffer registers
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXBUF0 : CAN Transmit Buffer 0
bits : 0 - 6 (7 bit)
TXBUF1 : CAN Transmit Buffer 1
bits : 8 - 14 (7 bit)
TXBUF2 : CAN Transmit Buffer 2
bits : 16 - 22 (7 bit)
TXBUF3 : CAN Transmit Buffer 3
bits : 24 - 30 (7 bit)
Combined CAN Receive Buffer registers
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXBUF0 : CAN Receive Buffer 0
bits : 0 - 6 (7 bit)
RXBUF1 : CAN Receive Buffer 1
bits : 8 - 14 (7 bit)
RXBUF2 : CAN Receive Buffer 2
bits : 16 - 22 (7 bit)
RXBUF3 : CAN Receive Buffer 3
bits : 24 - 30 (7 bit)
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