Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
DESC
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FRCLKMUXSEL : FRCLK MUX Select
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
1 : CLKREF
CLKREF selected as input to FRCLK
2 : Reserved1
Reserved1 Description
3 : EXTCLK
External Clock selected as input to FRCLK
0 : ROSC
ROSC selected as input to FRCLK
End of enumeration elements list.
ROSCEN : ROSC Enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disabled
ROSC Disabled
1 : Enabled
ROSC Enabled
End of enumeration elements list.
SCLKMUXSEL : SCLK Mux Select
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : FRCLK
FRCLK selected as input to SCLK
1 : PLLCLK
PLLCLK selected as input to SCLK
End of enumeration elements list.
CLKFAILEN : Clock Fail Enable
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disabled
Clock Fail Disabled
1 : Enabled
Clock Fail Enabled
End of enumeration elements list.
CLKFAILMUXSEL : Clock Fail Mux Select
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : FRCLK
FRCLK selected as input to Clock Fail
1 : PLLCLK
PLLCLK selected as input to Clock Fail
End of enumeration elements list.
CLKFAILIF : Clock Fail Interrupt Flag
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Not Set
Int Flag Not Set
1 : Set
Int Flag Set
End of enumeration elements list.
LDOEN : 1.8V LDO Enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disabled
1.8V LDO Disabled
1 : Enabled
1.8V LDO Enabled
End of enumeration elements list.
SWRESET : Software Reset
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Not Reset
SW Reset Not Initiated
1 : Reset
SW Reset Initiated
End of enumeration elements list.
PCLKEN : PCLK Enable
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disabled
PCLK Disabled
1 : Enabled
PCLK Enabled
End of enumeration elements list.
ACLKEN : ACLK Enable
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disabled
ACLK Disabled
1 : Enabled
ACLK Enabled
End of enumeration elements list.
ADCLKEN : ADCCLK Enable
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : Disabled
ADCCLK Disabled
1 : Enabled
ADCCLK Enabled
End of enumeration elements list.
STCLKSLPEN : SysTick Clock Sleep Enable
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disabled
SysTick clock active in deep sleep
1 : Enabled
SysTick clock gated in deep sleep
End of enumeration elements list.
PCLKDIV : PCLK Divider
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
0 : HCLK /1
PCLK
1 : HCLK /2
PCLK
2 : HCLK /3
PCLK
3 : HCLK /4
PCLK
4 : HCLK /5
PCLK
5 : HCLK /6
PCLK
6 : HCLK /7
PCLK
7 : HCLK /8
PCLK
End of enumeration elements list.
ACLKDIV : ACLK Divider
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
0 : SCLK /1
ACLK
1 : SCLK /2
ACLK
2 : SCLK /3
ACLK
3 : SCLK /4
ACLK
4 : SCLK /5
ACLK
5 : SCLK /6
ACLK
6 : SCLK /7
ACLK
7 : SCLK /8
ACLK
End of enumeration elements list.
HCLKDIV : HCLK Divider
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : SCLK /1
HCLK
1 : SCLK /2
HCLK
2 : SCLK /3
HCLK
3 : SCLK /4
HCLK
4 : SCLK /5
HCLK
5 : SCLK /6
HCLK
6 : SCLK /7
HCLK
7 : SCLK /8
HCLK
End of enumeration elements list.
USAMODE : USART A Mode
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : SSP
SSP Mode
1 : UART
UART Mode
End of enumeration elements list.
USBMODE : USART B Mode
bits : 29 - 58 (30 bit)
access : read-write
Enumeration:
0 : SSP
SSP Mode
1 : UART
UART Mode
End of enumeration elements list.
USCMODE : USART C Mode
bits : 30 - 60 (31 bit)
access : read-write
Enumeration:
0 : SSP
SSP Mode
1 : UART
UART Mode
End of enumeration elements list.
USDMODE : USART D Mode
bits : 31 - 62 (32 bit)
access : read-write
Enumeration:
0 : SSP
SSP Mode
1 : UART
UART Mode
End of enumeration elements list.
PB Peripheral MUX Select
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PB0 : PB0 MUX Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
1 : TAPWM0
Timer A PWM0 Selected
2 : TBPWM0
Timer B PWM0 Selected
4 : TCPWM0
Timer C PWM0 Selected
5 : TDPWM0
Timer D PWM0 Selected
0 : GPIOB0
GPIO selected
End of enumeration elements list.
PB1 : PB1 MUX Select
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
1 : TAPWM1
Timer A PWM1 Selected
2 : TBPWM1
Timer B PWM1 Selected
4 : TCPWM1
Timer C PWM1 Selected
5 : TDPWM1
Timer D PWM1 Selected
0 : GPIOB1
GPIO selected
End of enumeration elements list.
PB2 : PB2 MUX Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
1 : TAPWM2
Timer A PWM2 Selected
2 : TBPWM2
Timer B PWM2 Selected
4 : TCPWM2
Timer C PWM2 Selected
5 : TDPWM2
Timer D PWM2 Selected
0 : GPIOB2
GPIO selected
End of enumeration elements list.
PB3 : PB3 MUX Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
1 : TAPWM3
Timer A PWM3 Selected
2 : TBPWM3
Timer B PWM3 Selected
4 : TCPWM3
Timer C PWM3 Selected
5 : TDPWM3
Timer D PWM3 Selected
0 : GPIOB3
GPIO selected
End of enumeration elements list.
PB4 : PB4 MUX Select
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
1 : TAPWM4
Timer A PWM4 Selected
2 : TBPWM4
Timer B PWM4 Selected
3 : TCPWM0
Timer C PWM0 Selected
4 : TCPWM4
Timer C PWM4 Selected
5 : TDPWM4
Timer D PWM4 Selected
0 : GPIOB4
GPIO selected
End of enumeration elements list.
PB5 : PB5 MUX Select
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
1 : TAPWM5
Timer A PWM5 Selected
2 : TBPWM5
Timer B PWM5 Selected
3 : TCPWM1
Timer C PWM1 Selected
4 : TCPWM5
Timer C PWM5 Selected
5 : TDPWM5
Timer D PWM5 Selected
0 : GPIOB5
GPIO selected
End of enumeration elements list.
PB6 : PB6 MUX Select
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
1 : TAPWM6
Timer A PWM6 Selected
2 : TBPWM6
Timer B PWM6 Selected
3 : TCPWM2
Timer C PWM2 Selected
4 : TCPWM6
Timer C PWM6 Selected
5 : TDPWM6
Timer D PWM6 Selected
0 : GPIOB6
GPIO selected
End of enumeration elements list.
PB7 : PB7 MUX Select
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
1 : TAPWM7
Timer A PWM7 Selected
2 : TBPWM7
Timer B PWM7 Selected
3 : TCPWM3
Timer C PWM3 Selected
4 : TCPWM7
Timer C PWM7 Selected
5 : TDPWM7
Timer D PWM7 Selected
0 : GPIOB7
GPIO selected
End of enumeration elements list.
PC Peripheral MUX Select
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PC0 : PC0 MUX Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
1 : TBPWM0
Timer B PWM0 Selected
2 : TCPWM0
Timer C PWM0 Selected
3 : TBQEPIDX
Timer B QEP Index Selected
4 : USBMOSI
USART B MOSI/TX Selected
5 : USCSCLK
USART C SPI Clock Selected
6 : CANRXD
CAN Rx Data Selected
7 : I2CSCL
I2C SCL Selected
0 : GPIOC0
GPIO selected
End of enumeration elements list.
PC1 : PC1 MUX Select
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
1 : TBPWM1
Timer B PWM1 Selected
2 : TCPWM1
Timer C PWM1 Selected
3 : TBQEPPHA
Timer B QEP Phase A Selected
4 : USBMISO
USART B MISO/RX Selected
5 : USCSS
USART C Slave Select Selected
6 : CANTXD
CAN Tx Data Selected
7 : I2CSDA
I2C SDA Selected
0 : GPIOC1
GPIO selected
End of enumeration elements list.
PC2 : PC2 MUX Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
1 : TBPWM2
Timer B PWM2 Selected
2 : TCPWM2
Timer C PWM2 Selected
3 : TBQEPPHB
Timer B QEP Phase B Selected
4 : USBSCLK
USART B SCLK Selected
5 : USCMOSI
USART C MOSI/TX Selected
7 : EMUXD
EMUX Data Selected
0 : GPIOC2
GPIO selected
End of enumeration elements list.
PC3 : PC3 MUX Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
1 : TBPWM3
Timer B PWM3 Selected
2 : TCPWM3
Timer C PWM3 Selected
4 : USBSS
USART B Slave Select Selected
5 : USCMISO
USART C MISO/RX Selected
7 : EMUXC
EMUX Clock Selected
0 : GPIOC3
GPIO selected
End of enumeration elements list.
PC4 : PC4 MUX Select
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
1 : TBPWM4
Timer B PWM4 Selected
2 : TCPWM4
Timer C PWM4 Selected
3 : TCQEPIDX
Timer C QEP Index Selected
4 : USBMOSI
USART B MOSI/TX Selected
5 : USCSCLK
USART C SPI Clock Selected
6 : CANRXD
CAN Rx Data Selected
7 : I2CSCL
I2C SCL Selected
0 : GPIOC4
GPIO selected
End of enumeration elements list.
PC5 : PC5 MUX Select
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
1 : TBPWM5
Timer B PWM5 Selected
2 : TCPWM5
Timer C PWM5 Selected
3 : TCQEPPHA
Timer C QEP Phase A Selected
4 : USBMISO
USART B MISO/RX Selected
5 : USCSS
USART C Slave Select Selected
6 : CANTXD
CAN Tx Data Selected
7 : I2CSDA
I2C SDA Selected
0 : GPIOC5
GPIO selected
End of enumeration elements list.
PC6 : PC6 MUX Select
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
1 : TBPWM6
Timer B PWM6 Selected
2 : TCPWM6
Timer C PWM6 Selected
3 : TCQEPPHB
Timer C QEP Phase B Selected
4 : USBSCLK
USART B SCLK Selected
5 : USCMOSI
USART C MOSI/TX Selected
7 : EMUXD
EMUX Data Selected
0 : GPIOC6
GPIO selected
End of enumeration elements list.
PC7 : PC7 MUX Select
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
1 : TBPWM7
Timer B PWM7 Selected
2 : TCPWM7
Timer C PWM7 Selected
4 : USBSS
USART B Slave Select Selected
5 : USCMISO
USART C MISO/RX Selected
6 : FRCLK
FRCLK Output Selected
7 : EMUXC
EMUX Clock Selected
0 : GPIOC7
GPIO selected
End of enumeration elements list.
PD Peripheral MUX Select
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD0 : PD0 MUX Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
1 : TBPWM0
Timer B PWM0 Selected
2 : TCPWM0
Timer C PWM0 Selected
3 : TDQEPIDX
Timer D QEP Index Selected
5 : USCSCLK
USART C SPI Clock Selected
6 : CANTXD
CAN Tx Data Selected
7 : EMUXD
EMUX Data Selected
0 : GPIOD0
GPIO selected
End of enumeration elements list.
PD1 : PD1 MUX Select
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
1 : TBPWM1
Timer B PWM1 Selected
2 : TCPWM1
Timer C PWM1 Selected
3 : TDQEPPHA
Timer D QEP Phase A Selected
5 : USCSS
USART C Slave Select Selected
6 : CANRXD
CAN Rx Data Selected
7 : EMUXC
EMUX Clock Selected
0 : GPIOD1
GPIO selected
End of enumeration elements list.
PD2 : PD2 MUX Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
1 : TBPWM2
Timer B PWM2 Selected
2 : TCPWM2
Timer C PWM2 Selected
3 : TDQEPPHB
Timer D QEP Phase B Selected
5 : USCMOSI
USART C MOSI/TX Selected
0 : GPIOD2
GPIO selected
End of enumeration elements list.
PD3 : PD3 MUX Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
1 : TBPWM3
Timer B PWM3 Selected
2 : TCPWM3
Timer C PWM3 Selected
5 : USCMISO
USART C MISO/RX Selected
6 : FRCLK
FRCLK output selected
7 : TRACED3
TRACE Data 3 output selected
0 : GPIOD3
GPIO selected
End of enumeration elements list.
PD4 : PD4 MUX Select
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
1 : TBPWM4
Timer B PWM4 Selected
2 : TCPWM4
Timer C PWM4 Selected
3 : TDQEPIDX
Timer D QEP Index Selected
4 : TBQEPIDX
Timer B QEP Index Selected
5 : USDSCLK
USART D SPI Clock Selected
6 : TRACED3
TRACE Data 3 output selected
7 : USDMOSI
USART D MOSI/TX Selected
0 : GPIOD4
GPIO selected
End of enumeration elements list.
PD5 : PD5 MUX Select
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
1 : TBPWM5
Timer B PWM5 Selected
2 : TCPWM5
Timer C PWM5 Selected
3 : TDQEPPHA
Timer D QEP Phase A Selected
4 : TDQEPPHB
Timer D QEP Phase B Selected
5 : USDSCLK
USART D SPI Clock Selected
6 : CANRXD
CAN Rx Data Selected
7 : USDMISO
USART D MISO/RX Selected
0 : GPIOD5
GPIO selected
End of enumeration elements list.
PD6 : PD6 MUX Select
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
1 : TBPWM6
Timer B PWM6 Selected
2 : TCPWM6
Timer C PWM6 Selected
3 : TDQEPPHB
Timer D QEP Phase B Selected
4 : TBQEPPHB
Timer B QEP Phase B Selected
5 : USDMOSI
USART D MOSI/TX Selected
6 : CANTXD
CAN Tx Data Selected
7 : I2CSDA
I2C SDA Selected
0 : GPIOD6
GPIO selected
End of enumeration elements list.
PD7 : PD7 MUX Select
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
1 : TBPWM7
Timer B PWM7 Selected
2 : TCPWM7
Timer C PWM7 Selected
5 : USDMISO
USART C MISO/RX Selected
6 : CANRXD
CAN Rx Data Selected
7 : I2CSCL
I2C SCL Selected
0 : GPIOD7
GPIO selected
End of enumeration elements list.
PE Peripheral MUX Select
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PE0 : PE0 MUX Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
1 : TCPWM4
Timer C PWM4 Selected
2 : TDPWM0
Timer D PWM0 Selected
3 : TAQEPIDX
Timer A QEP Index Selected
4 : TBQEPIDX
Timer B QEP Index Selected
5 : USCSCLK
USART C SPI Clock Selected
6 : I2CSCL
I2C SCL Selected
7 : EMUXC
EMUX Clock Selected
0 : GPIOE0
GPIO selected
End of enumeration elements list.
PE1 : PE1 MUX Select
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
1 : TCPWM5
Timer C PWM5 Selected
2 : TDPWM1
Timer D PWM1 Selected
3 : TAQEPPHA
Timer A QEP Phase A Selected
4 : TBQEPPHA
Timer B QEP Phase A Selected
5 : USCSS
USART C Slave Select Selected
6 : I2CSDA
I2C SDA Selected
7 : EMUXD
EMUX Data Selected
0 : GPIOE1
GPIO selected
End of enumeration elements list.
PE2 : PE2 MUX Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
1 : TCPWM6
Timer C PWM6 Selected
2 : TDPWM2
Timer D PWM2 Selected
3 : TAQEPPHB
Timer A QEP Phase B Selected
4 : TBQEPPHB
Timer B QEP Phase B Selected
5 : USCMOSI
USART C MOSI/TX Selected
6 : CANRXD
CAN Rx Data Selected
7 : EXTCLK
External clock input Selected
0 : GPIOE2
GPIO selected
End of enumeration elements list.
PE3 : PE3 MUX Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
1 : TCPWM7
Timer C PWM7 Selected
2 : TDPWM3
Timer D PWM3 Selected
3 : FRCLK
FRCLK Output Selected
5 : USCMISO
USART C MISO/RX Selected
6 : CANTXD
CAN Tx Data Selected
0 : GPIOE3
GPIO selected
End of enumeration elements list.
PE4 : PE4 MUX Select
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
1 : TCPWM4
Timer C PWM4 Selected
2 : TDPWM4
Timer D PWM4 Selected
3 : TDQEPIDX
Timer D QEP Index Selected
4 : USBSCLK
USART B SCLK Selected
5 : USDMOSI
USART D MOSI/TX Selected
6 : I2CSCL
I2C SCL Selected
0 : GPIOE4
GPIO selected
End of enumeration elements list.
PE5 : PE5 MUX Select
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
1 : TCPWM5
Timer C PWM5 Selected
2 : TDPWM5
Timer D PWM5 Selected
3 : TDQEPPHA
Timer D QEP Phase A Selected
4 : USBSS
USART B Slave Select Selected
5 : USDMISO
USART D MISO/RX Selected
6 : I2CSDA
I2C SDA Selected
0 : GPIOE5
GPIO selected
End of enumeration elements list.
PE6 : PE6 MUX Select
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
1 : TCPWM6
Timer C PWM6 Selected
2 : TDPWM6
Timer D PWM6 Selected
3 : TDQEPPHB
Timer D QEP Phase B Selected
4 : USBMOSI
USART B MOSI/TX Selected
5 : USDSCLK
USART D SCLK Selected
6 : CANRXD
CAN RX Data Selected
0 : GPIOE6
GPIO selected
End of enumeration elements list.
PE7 : PE7 MUX Select
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
1 : TCPWM7
Timer C PWM7 Selected
2 : TDPWM7
Timer D PWM7 Selected
4 : USBMISO
USART B MISO/RX Selected
5 : USDSS
USART D Slave Select Selected
6 : CANTXD
CAN TX Data Selected
0 : GPIOE7
GPIO selected
End of enumeration elements list.
PF Peripheral MUX Select
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PF0 : PF0 MUX Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
1 : TCPWM0
Timer C PWM0 Selected
2 : TDPWM0
Timer D PWM0 Selected
3 : TCK_SWDCLK
TCK/SWDCLK Selected
4 : TBQEPIDX
Timer B QEP Index Selected
5 : USBSCLK
USART B SPI Clock Selected
6 : TRACED2
TRACED2 Selected
7 : TRACECLK
TRACECLK Selected
0 : GPIOF0
GPIO selected
End of enumeration elements list.
PF1 : PF1 MUX Select
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
1 : TCPWM1
Timer C PWM1 Selected
2 : TDPWM1
Timer D PWM1 Selected
3 : TMS_SWDIO
TMS/SWDIO Selected
4 : TBQEPPHA
Timer B QEP Phase A Selected
5 : USBSS
USART B Slave Select Selected
6 : TRACED1
TRACED1 Selected
7 : TRACED0
TRACED0 Selected
0 : GPIOF1
GPIO selected
End of enumeration elements list.
PF2 : PF2 MUX Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
1 : TCPWM2
Timer C PWM2 Selected
2 : TDPWM2
Timer D PWM2 Selected
3 : TDI
TDI Selected
4 : TBQEPPHB
Timer B QEP Phase B Selected
5 : USBMOSI
USART B MOSI/TX Selected
6 : TRACED0
TRACED0 Selected
7 : TRACED1
TRACED1 Selected
0 : GPIOF2
GPIO selected
End of enumeration elements list.
PF3 : PF3 MUX Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
1 : TCPWM3
Timer C PWM3 Selected
2 : TDPWM3
Timer D PWM3 Selected
3 : TDO
TDO Selected
4 : FRCLK
FRCLK Output Selected
5 : USBMISO
USART B MISO/RX Selected
6 : TRACECLK
TRACECLK Selected
7 : TRACED2
TRACED2 Selected
0 : GPIOF3
GPIO selected
End of enumeration elements list.
PF4 : PF4 MUX Select
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
1 : TCPWM4
Timer C PWM4 Selected
2 : TDPWM4
Timer D PWM4 Selected
4 : TCQEPIDX
Timer C QEP Index Selected
5 : USDSCLK
USART D SCLK Selected
6 : TRACED3
TRACED3 Selected
7 : EMUXC
EMUX Clock Selected
0 : GPIOF4
GPIO selected
End of enumeration elements list.
PF5 : PF5 MUX Select
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
1 : TCPWM5
Timer C PWM5 Selected
2 : TDPWM5
Timer D PWM5 Selected
4 : TCQEPPHA
Timer C QEP Phase A Selected
5 : USDSS
USART D Slave Select Selected
7 : EMUXD
EMUX Data Selected
0 : GPIOF5
GPIO selected
End of enumeration elements list.
PF6 : PF6 MUX Select
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
1 : TCPWM6
Timer C PWM6 Selected
2 : TDPWM6
Timer D PWM6 Selected
4 : TCQEPPHB
Timer C QEP Phase B Selected
5 : USDMOSI
USART D MOSI/TX Selected
6 : CANRXD
CAN RX Data Selected
7 : I2CSCL
I2C SCL Selected
0 : GPIOF6
GPIO selected
End of enumeration elements list.
PF7 : PF7 MUX Select
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
1 : TCPWM7
Timer C PWM7 Selected
2 : TDPWM7
Timer D PWM7 Selected
5 : USDMISO
USART D MISO/RX Selected
6 : CANTXD
CAN TX Data Selected
7 : I2CSDA
I2C SDA Selected
0 : GPIOF7
GPIO selected
End of enumeration elements list.
PG Peripheral MUX Select
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG0 : PG0 MUX Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
1 : TCPWM0
Timer C PWM0 Selected
2 : TDPWM0
Timer D PWM0 Selected
3 : EMUXC
EMUX Clock Selected
5 : USDSCLK
USART D SPI Clock Selected
6 : TRACECLK
TRACECLK Selected
7 : TCQEPIDX
Timer C QEP Index Selected
0 : GPIOG0
GPIO selected
End of enumeration elements list.
PG1 : PG1 MUX Select
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
1 : TCPWM1
Timer C PWM1 Selected
2 : TDPWM1
Timer D PWM1 Selected
3 : EMUXD
EMUX Data Selected
5 : USDSS
USART D Slave Select Selected
6 : TRACED0
TRACED0 Selected
7 : TCQEPPHA
Timer C QEP Phase A Selected
0 : GPIOG1
GPIO selected
End of enumeration elements list.
PG2 : PG2 MUX Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
1 : TCPWM2
Timer C PWM2 Selected
2 : TDPWM2
Timer D PWM2 Selected
3 : FRCLK
FRCLK Output Selected
5 : USDMOSI
USART D MOSI/TX Selected
6 : TRACED1
TRACED1 Selected
7 : TCQEPPHB
Timer C QEP Phase B Selected
0 : GPIOG2
GPIO selected
End of enumeration elements list.
PG3 : PG3 MUX Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
1 : TCPWM3
Timer C PWM3 Selected
2 : TDPWM3
Timer D PWM3 Selected
5 : USDMISO
USART D MISO/RX Selected
6 : TRACED2
TRACED2 Selected
0 : GPIOG3
GPIO selected
End of enumeration elements list.
PG4 : PG4 MUX Select
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
1 : TCPWM4
Timer C PWM4 Selected
2 : TDPWM4
Timer D PWM4 Selected
3 : EMUXD
EMUX Data Selected
4 : I2CSCL
I2C SCL Selected
5 : USDSS
USART D Slave Select Selected
6 : TRACED3
TRACED3 Selected
7 : TDQEPIDX
Timer D QEP Index Selected
0 : GPIOG4
GPIO selected
End of enumeration elements list.
PG5 : PG5 MUX Select
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
1 : TCPWM5
Timer C PWM5 Selected
2 : TDPWM5
Timer D PWM5 Selected
3 : EMUXC
EMUX Clock Selected
5 : USDMOSI
USART D MOSI/TX Selected
6 : CANRXD
CAN RX Data Selected
7 : TDQEPPHA
Timer D QEP Phase A Selected
0 : GPIOG5
GPIO selected
End of enumeration elements list.
PG6 : PG6 MUX Select
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
1 : TCPWM6
Timer C PWM6 Selected
2 : TDPWM6
Timer D PWM6 Selected
3 : I2CSDA
I2C SDA Selected
5 : USDMISO
USART D MISO/RX Selected
6 : CANTXD
CAN TX Data Selected
7 : TDQEPPHB
Timer D QEP Phase B
0 : GPIOG6
GPIO selected
End of enumeration elements list.
PG7 : PG7 MUX Select
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
2 : TDQEPIDX
Timer D QEP Index Selected
5 : USDSCLK
USART D SPI Clock Selected
0 : GPIOG7
GPIO selected
End of enumeration elements list.
PA Weak Pull-up Enable
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PB Weak Pull-up Enable
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PC Weak Pull-up Enable
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD Weak Pull-up Enable
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PE Weak Pull-up Enable
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PF Weak Pull-up Enable
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DESC
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PLLEN : PLL Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disabled
PLL Disabled
1 : Enabled
PLL Enabled
End of enumeration elements list.
PLLBP : PLL Bypass
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Inactive
PLL is not bypassed
1 : Active
PLL is bypassed
End of enumeration elements list.
PLLOUTDIV : PLL Output Divider
bits : 2 - 5 (4 bit)
access : read-write
Enumeration:
0 : /1
PLL output divided by 1
1 : /2
PLL output divided by 2
2 : /3
PLL output divided by 3
3 : /4
PLL output divided by 4
End of enumeration elements list.
PLLINDIV : PLL Input Divider
bits : 4 - 11 (8 bit)
access : read-write
PLLFBDIV : PLL Feedback Divider
bits : 8 - 29 (22 bit)
access : read-write
PLLLOCK : PLL Lock Status
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : Not Locked
PLL is not locked
1 : Locked
PLL is locked
End of enumeration elements list.
PG Weak Pull-up Enable
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PA Weak Pull-down Enable
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PB Weak Pull-down Enable
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PC Weak Pull-down Enable
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD Weak Pull-down Enable
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PE Weak Pull-down Enable
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PF Weak Pull-down Enable
address_offset : 0x58 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG Weak Pull-down Enable
address_offset : 0x5C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PA Drive Strength/Schmitt Trigger
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PB Drive Strength/Schmitt Trigger
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PC Drive Strength/Schmitt Trigger
address_offset : 0x68 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD Drive Strength/Schmitt Trigger
address_offset : 0x6C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PE Drive Strength/Schmitt Trigger
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PF Drive Strength/Schmitt Trigger
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG Drive Strength/Schmitt Trigger
address_offset : 0x78 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DESC
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PA Peripheral MUX Select
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PA0 : PA0 MUX Select
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : GPIOA0
GPIO selected
End of enumeration elements list.
PA1 : PA1 MUX Select
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
1 : EMUXD
EMUX Data Selected
0 : GPIOA1
GPIO selected
End of enumeration elements list.
PA2 : PA2 MUX Select
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
1 : EMUXC
EMUX Clock Selected
0 : GPIOA2
GPIO selected
End of enumeration elements list.
PA3 : PA3 MUX Select
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
1 : USASCLK
USART A SCLK Selected
2 : USBSCLK
USART B SCLK Selected
0 : GPIOA3
GPIO selected
End of enumeration elements list.
PA4 : PA4 MUX Select
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
1 : USAMOSI
USART A MOSI/TX Selected
2 : USBMOSI
USART B MOSI/TX Selected
0 : GPIOA4
GPIO selected
End of enumeration elements list.
PA5 : PA5 MUX Select
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
1 : USAMISO
USART A MISO/RX Selected
2 : USBMISO
USART B MISO/RX Selected
0 : GPIOA5
GPIO selected
End of enumeration elements list.
PA6 : PA6 MUX Select
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
1 : USASS
USART A SPI Slave Select
2 : USBSS
USART B SPI Slave Select
0 : GPIOA6
GPIO selected
End of enumeration elements list.
PA7 : PA7 MUX Select
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
0 : GPIOA7
GPIO selected
End of enumeration elements list.
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