Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
16-bit load value
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Load value
bits : 0 - 15 (16 bit)
Capture Register
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Capture value
bits : 0 - 15 (16 bit)
Status Register
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMOUT : Time out event occurred
bits : 0 - 0 (1 bit)
Enumeration:
0 : CLR
None
1 : SET
None
End of enumeration elements list.
CAP : Capture event pending
bits : 1 - 1 (1 bit)
Enumeration:
0 : CLR
None
1 : SET
None
End of enumeration elements list.
CON : Ready to receive commands
bits : 6 - 6 (1 bit)
Enumeration:
0 : CLR
None
1 : SET
None
End of enumeration elements list.
CLRI : Value updated in the timer clock domain
bits : 7 - 7 (1 bit)
Enumeration:
0 : CLR
None
1 : SET
None
End of enumeration elements list.
16-bit timer value, read only.
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Current value
bits : 0 - 15 (16 bit)
Control Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRE : Prescaler
bits : 0 - 1 (2 bit)
Enumeration:
0 : DIV1
None
1 : DIV16
None
2 : DIV256
None
3 : DIV32768
- If the selected clock source is UCLK then this setting results in a prescaler of 4.
End of enumeration elements list.
UP : Count-up
bits : 2 - 2 (1 bit)
Enumeration:
0 : DIS
None
1 : EN
None
End of enumeration elements list.
MOD : Mode
bits : 3 - 3 (1 bit)
Enumeration:
0 : FREERUN
None
1 : PERIODIC
None
End of enumeration elements list.
ENABLE : Enable
bits : 4 - 4 (1 bit)
Enumeration:
0 : DIS
None
1 : EN
None
End of enumeration elements list.
CLK : Clock Select
bits : 5 - 6 (2 bit)
Enumeration:
0 : UCLK
- System Clock
1 : PCLK
- Peripheral clock
2 : LFOSC
- Internal 32 kHz Oscillator
3 : LFXTAL
- External 32 kHz crystal
End of enumeration elements list.
RLD : Timer reload on write to clear register
bits : 7 - 7 (1 bit)
Enumeration:
0 : DIS
None
1 : EN
None
End of enumeration elements list.
EVENT : Event Select, selects 1 of the available events.
bits : 8 - 11 (4 bit)
Enumeration:
0 : T2
- Wakeup Timer
1 : EXT0
- External interrupt 0
2 : EXT1
- External interrupt 1
3 : EXT2
- External interrupt 2
4 : EXT3
- External interrupt 3
5 : EXT4
- External interrupt 4
6 : EXT5
- External interrupt 5
7 : EXT6
- External interrupt 6
8 : EXT7
- External interrupt 7
9 : T3
- Watchdog timer
10 : T1
- Timer1
11 : ADC0
- ADC0
12 : ADC1
- ADC1
13 : STEP
- STEP
14 : DMADONE
None
15 : FEE
- Flash controller
End of enumeration elements list.
EVENTEN : Enable time capture of an event
bits : 12 - 12 (1 bit)
Enumeration:
0 : DIS
None
1 : EN
None
End of enumeration elements list.
Clear interrupt register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMOUT : Clear timeout interrupt
bits : 0 - 0 (1 bit)
Enumeration:
1 : CLR
None
End of enumeration elements list.
CAP : Clear captured event interrupt
bits : 1 - 1 (1 bit)
Enumeration:
1 : CLR
None
End of enumeration elements list.
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