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RESET

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

RSTSTA

RSTCLR


RSTSTA

Reset Status
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RSTSTA RSTSTA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 POR EXTRST WDRST SWRST

POR : Power-on reset status bit
bits : 0 - 0 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

EXTRST : External reset status bit
bits : 1 - 1 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

WDRST : Watchdog reset status bit
bits : 2 - 2 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

SWRST : Software reset status bit
bits : 3 - 3 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.


RSTCLR

Reset Status Clear
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : RSTSTA
reset_Mask : 0x0

RSTCLR RSTCLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 POR EXTRST WDRST SWRST

POR : Power-on reset status bit
bits : 0 - 0 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

EXTRST : External reset status bit
bits : 1 - 1 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

WDRST : Watchdog reset status bit
bits : 2 - 2 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

SWRST : Software reset status bit
bits : 3 - 3 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.



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