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WUT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x44 byte (0x0)
mem_usage : registers
protection : not protected

Registers

T2VAL0

T2WUFB0

T2WUFB1

T2WUFC0

T2WUFC1

T2WUFD0

T2WUFD1

T2IEN

T2STA

T2CLRI

T2WUFA0

T2VAL1

T2WUFA1

T2CON

T2INC


T2VAL0

Current count value LSB
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2VAL0 T2VAL0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2WUFB0

Wake up field B LSB
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFB0 T2WUFB0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2WUFB1

Wake up field B MSB
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFB1 T2WUFB1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2WUFC0

Wake up field C LSB
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFC0 T2WUFC0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2WUFC1

Wake up field C MSB
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFC1 T2WUFC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2WUFD0

Wake up field D LSB
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFD0 T2WUFD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2WUFD1

Wake up field D MSB
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFD1 T2WUFD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2IEN

Interrupt enable
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2IEN T2IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WUFA WUFB WUFC WUFD ROLL

WUFA : Enable interrupt on WUFA
bits : 0 - 0 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

WUFB : Enable interrupt on WUFB
bits : 1 - 1 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

WUFC : Enable interrupt on WUFC
bits : 2 - 2 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

WUFD : Enable interrupt on WUFD
bits : 3 - 3 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

ROLL : Enable interrupt on Rollover
bits : 4 - 4 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.


T2STA

Status
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2STA T2STA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WUFA WUFB WUFC WUFD ROLL FREEZE CON

WUFA : WUFA Interrupt
bits : 0 - 0 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

WUFB : WUFB Interrupt
bits : 1 - 1 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

WUFC : WUFC Interrupt
bits : 2 - 2 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

WUFD : WUFD Interrupt
bits : 3 - 3 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

ROLL : Rollover Interrupt
bits : 4 - 4 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

FREEZE : Timer Value Freeze
bits : 7 - 7 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.

CON : Sync
bits : 8 - 8 (1 bit)

Enumeration:

0 : CLR

None

1 : SET

None

End of enumeration elements list.


T2CLRI

Clear interrupts. Write only.
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2CLRI T2CLRI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WUFA WUFB WUFC WUFD ROLL

WUFA : Clear interrupt on WUFA
bits : 0 - 0 (1 bit)

Enumeration:

1 : CLR

None

End of enumeration elements list.

WUFB : Clear interrupt on WUFB
bits : 1 - 1 (1 bit)

Enumeration:

1 : CLR

None

End of enumeration elements list.

WUFC : Clear interrupt on WUFC
bits : 2 - 2 (1 bit)

Enumeration:

1 : CLR

None

End of enumeration elements list.

WUFD : Clear interrupt on WUFD
bits : 3 - 3 (1 bit)

Enumeration:

1 : CLR

None

End of enumeration elements list.

ROLL : Clear interrupt on Rollover
bits : 4 - 4 (1 bit)

Enumeration:

1 : CLR

None

End of enumeration elements list.


T2WUFA0

Wake up field A LSB.
address_offset : 0x3C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFA0 T2WUFA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2VAL1

Current count value MSB
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2VAL1 T2VAL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2WUFA1

Wake up field A MSB.
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2WUFA1 T2WUFA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Value
bits : 0 - 15 (16 bit)


T2CON

Control Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2CON T2CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRE FREEZE MOD ENABLE WUEN CLK STOPINC

PRE : Prescaler
bits : 0 - 1 (2 bit)

Enumeration:

0 : DIV1

None

1 : DIV16

None

2 : DIV256

None

3 : DIV32768

None

End of enumeration elements list.

FREEZE : Freeze
bits : 3 - 3 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

MOD : Mode
bits : 6 - 6 (1 bit)

Enumeration:

0 : PERIODIC

None

1 : FREERUN

None

End of enumeration elements list.

ENABLE : Enable
bits : 7 - 7 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

WUEN : WUEN
bits : 8 - 8 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

CLK : Clock
bits : 9 - 10 (2 bit)

Enumeration:

0 : PCLK

None

1 : LFXTAL

None

2 : LFOSC

None

3 : EXTCLK

None

End of enumeration elements list.

STOPINC : Stop wake up field A being updated
bits : 11 - 11 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.


T2INC

12-bit register. Wake up field A
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

T2INC T2INC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : 12 bit value
bits : 0 - 11 (12 bit)



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