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ADC1

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x60 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ADC1STA

ADC1INTGN

ADC1EXTGN

ADC1VDDGN

ADCSCFG1

ADC1FLT

ADC1MDE

ADC1RCR

ADC1RCV

ADC1TH

ADC1THC

ADC1THV

ADC1ACC

ADC1MSKI

ADC1ATH

ADC1PRO

ADC1DAT

ADC1CON

ADC1OF


ADC1STA

ADC Status register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1STA ADC1STA read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RDY OVR THEX ATHEX ERR CAL

RDY : valid conversion result
bits : 0 - 0 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

OVR : ADC overrange bit.
bits : 1 - 1 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

THEX : ADC comparator threshold.
bits : 2 - 2 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

ATHEX : ADC Accumulator Comparator Threshold status bit.
bits : 3 - 3 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

ERR : ADC conversion error status bit.
bits : 4 - 4 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

CAL : ADC Calibration status register
bits : 5 - 5 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.


ADC1INTGN

Gain calibration register when using internal reference
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1INTGN ADC1INTGN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Gain with Int Ref
bits : 0 - 15 (16 bit)


ADC1EXTGN

Gain calibration register when using external reference
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1EXTGN ADC1EXTGN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Gain with Ext Ref
bits : 0 - 15 (16 bit)


ADC1VDDGN

Gain calibration register when using AVDD as the ADC reference
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1VDDGN ADC1VDDGN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Gain with Avdd Ref
bits : 0 - 15 (16 bit)


ADCSCFG1

Control register for the VBIAS voltage generator, ground switch and external reference buffer
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADCSCFG1 ADCSCFG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTBUF GNDSWRESEN GNDSWON PINSEL BOOST30 SIMU

EXTBUF : Control signals for ext_ref buffers bits
bits : 0 - 1 (2 bit)

Enumeration:

0 : OFF

None

1 : VREFPN

None

2 : VREFP_VREF2P

None

End of enumeration elements list.

GNDSWRESEN : 20k resistor in series with GND_SW
bits : 6 - 6 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

GNDSWON : GND_SW
bits : 7 - 7 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

PINSEL : Enable vbias generator, send vbias to selected ain pin bits
bits : 8 - 10 (3 bit)

Enumeration:

0 : DIS

Disable VBIAS generator

4 : AIN7

None

6 : AIN11

None

End of enumeration elements list.

BOOST30 : Boost the Vbias current source ability by 30 times
bits : 13 - 13 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

SIMU : Enable both ADCs
bits : 15 - 15 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.


ADC1FLT

Filter configuration register
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1FLT ADC1FLT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SF NOTCH2 AF SINC4EN RAVG2 CHOP

SF : SINC Filter value
bits : 0 - 6 (7 bit)

NOTCH2 : Inserts a notch at FNOTCH2
bits : 7 - 7 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

AF : Averaging filter
bits : 8 - 11 (4 bit)

SINC4EN : Enable the Sinc4 filter instead of Sinc3 filter.
bits : 12 - 12 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

RAVG2 : Enables a running Average-By-2 bits
bits : 14 - 14 (1 bit)

Enumeration:

0 : OFF

None

1 : ON

None

End of enumeration elements list.

CHOP : Enables System-Chopping bits
bits : 15 - 15 (1 bit)

Enumeration:

0 : OFF

None

1 : ON

None

End of enumeration elements list.


ADC1MDE

mode control register
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1MDE ADC1MDE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCMD ADCMOD2 PGA

ADCMD : ADC Mode bits
bits : 0 - 2 (3 bit)

Enumeration:

0 : OFF

None

1 : CONT

None

2 : SINGLE

None

3 : IDLE

None

4 : INTOCAL

None

5 : INTGCAL

None

6 : SYSOCAL

None

7 : SYSGCAL

None

End of enumeration elements list.

ADCMOD2 : ADC modulator gain of 2 control bits
bits : 3 - 3 (1 bit)

Enumeration:

0 : MOD2OFF

None

1 : MOD2ON

None

End of enumeration elements list.

PGA : PGA Gain Select bit
bits : 4 - 7 (4 bit)

Enumeration:

0 : G1

None

1 : G2

None

2 : G4

None

3 : G8

None

4 : G16

None

5 : G32

None

6 : G64

None

7 : G128

None

End of enumeration elements list.


ADC1RCR

Number of ADC1 conversions before an ADC interrupt is generated.
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1RCR ADC1RCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 15 (16 bit)


ADC1RCV

This 16-bit, read-only MMR holds the current number of ADC1 conversion results
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1RCV ADC1RCV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 15 (16 bit)


ADC1TH

Sets the threshold
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1TH ADC1TH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 15 (16 bit)


ADC1THC

Determines how many cumulative ADC1 conversion result readings above ADC1TH must occur
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1THC ADC1THC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 7 (8 bit)


ADC1THV

8-bit threshold exceeded counter register
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1THV ADC1THV read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 7 (8 bit)


ADC1ACC

32-bit accumulator register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1ACC ADC1ACC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 31 (32 bit)


ADC1MSKI

Interrupt control register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1MSKI ADC1MSKI read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RDY OVR THEX ATHEX

RDY : valid conversion result mask
bits : 0 - 0 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

OVR : ADC overrange bit mask.
bits : 1 - 1 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

THEX : ADC comparator threshold mask
bits : 2 - 2 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

ATHEX : ADC Accumulator Comparator Threshold status bit mask
bits : 3 - 3 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.


ADC1ATH

Holds the threshold value for the accumulator comparator
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1ATH ADC1ATH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 31 (32 bit)


ADC1PRO

Configuration register for Post processing of ADC1 results
address_offset : 0x44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1PRO ADC1PRO read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RCEN OREN CMPEN ACCEN

RCEN : ADC Result Counter Enable
bits : 0 - 0 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

OREN : ADC OverRange Enable
bits : 1 - 1 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

CMPEN : ADC Comparator Enable bits
bits : 2 - 3 (2 bit)

Enumeration:

0 : Off

None

1 : En

None

2 : EnCnt

None

3 : EnCntDec

None

End of enumeration elements list.

ACCEN : ADC Accumulator Enable bits
bits : 4 - 5 (2 bit)

Enumeration:

0 : Off

None

1 : En

None

2 : EnNDec

None

3 : EnAccCnt

None

End of enumeration elements list.


ADC1DAT

conversion result register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1DAT ADC1DAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : TBD
bits : 0 - 31 (32 bit)


ADC1CON

Main control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1CON ADC1CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCCN ADCCP ADCDIAG ADCREF BUFBYPN BUFBYPP BUFPOWP BUFPOWN ADCCODE ADCEN

ADCCN : AIN- bits
bits : 0 - 4 (5 bit)

Enumeration:

0 : AIN0

None

1 : AIN1

None

2 : AIN2

None

3 : AIN3

None

4 : AIN4

None

5 : AIN5

None

6 : AIN6

None

7 : AIN7

None

8 : AIN8

None

9 : AIN9

None

10 : AIN10

None

11 : AIN11

None

12 : DAC

None

15 : AGND

None

17 : TEMP

None

End of enumeration elements list.

ADCCP : AIN+ bits
bits : 5 - 9 (5 bit)

Enumeration:

0 : AIN0

None

1 : AIN1

None

2 : AIN2

None

3 : AIN3

None

4 : AIN4

None

5 : AIN5

None

6 : AIN6

None

7 : AIN7

None

8 : AIN8

None

9 : AIN9

None

10 : AIN10

None

11 : AIN11

None

12 : DAC

None

13 : AVDD4

None

14 : IOVDD4

None

15 : AGND

None

16 : TEMP

None

End of enumeration elements list.

ADCDIAG : Diagnostic Current bits bits
bits : 10 - 11 (2 bit)

Enumeration:

0 : DIAG_OFF

None

1 : DIAG_POS

None

2 : DIAG_NEG

None

3 : DIAG_ALL

None

End of enumeration elements list.

ADCREF : Reference selection
bits : 12 - 13 (2 bit)

Enumeration:

0 : INTREF

None

1 : EXTREF

None

2 : EXTREF2

None

3 : AVDDREF

None

End of enumeration elements list.

BUFBYPN : Negative buffer bypass
bits : 14 - 14 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

BUFBYPP : Positive buffer bypass
bits : 15 - 15 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.

BUFPOWP : Positive buffer power down
bits : 16 - 16 (1 bit)

Enumeration:

0 : DIS

Disable powerdown - Positive buffer is enabled

1 : EN

Enable powerdown - Positive buffer is disabled

End of enumeration elements list.

BUFPOWN : Negative buffer power down
bits : 17 - 17 (1 bit)

Enumeration:

0 : DIS

Disable powerdown - Negative buffer is enabled

1 : EN

Enable powerdown - Negative buffer is disabled

End of enumeration elements list.

ADCCODE : ADC Output Coding bits
bits : 18 - 18 (1 bit)

Enumeration:

0 : INT

None

1 : UINT

None

End of enumeration elements list.

ADCEN : Enable Bit
bits : 19 - 19 (1 bit)

Enumeration:

0 : DIS

None

1 : EN

None

End of enumeration elements list.


ADC1OF

Offset calibration register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC1OF ADC1OF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Offset
bits : 0 - 15 (16 bit)



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