\n
address_offset : 0x0 Bytes (0x0)
size : 0x5C byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RNG : DAC Range bits
bits : 0 - 1 (2 bit)
Enumeration:
0 : IntVref
None
3 : AVdd
None
End of enumeration elements list.
MDE : Mode bits
bits : 2 - 3 (2 bit)
Enumeration:
0 : 12bit
None
3 : 16BitSlow
None
2 : 16BitFast
None
End of enumeration elements list.
CLR : bits
bits : 4 - 4 (1 bit)
Enumeration:
1 : Off
None
0 : On
None
End of enumeration elements list.
CLK : bits
bits : 5 - 5 (1 bit)
Enumeration:
0 : HCLK
None
1 : Timer1
None
End of enumeration elements list.
BUFBYP : TBD
bits : 6 - 6 (1 bit)
Enumeration:
0 : DIS
None
1 : EN
None
End of enumeration elements list.
NPN : TBD
bits : 8 - 8 (1 bit)
Enumeration:
0 : DIS
None
1 : EN
None
End of enumeration elements list.
PD : TBD
bits : 9 - 9 (1 bit)
Enumeration:
0 : DIS
None
1 : EN
None
End of enumeration elements list.
DMAEN : bits
bits : 10 - 10 (1 bit)
Enumeration:
0 : Off
None
1 : On
None
End of enumeration elements list.
Data Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Data
bits : 12 - 31 (20 bit)
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