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TMR0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

Registers

LOAD

CAPTURE

ALOAD

ACURCNT

STAT

PWMCTL

PWMMATCH

EVENTSELECT

CURCNT

CTL

CLRINT


LOAD

16-bit Load Value
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOAD LOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Load Value
bits : 0 - 15 (16 bit)
access : read-write


CAPTURE

Capture
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAPTURE CAPTURE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : 16-bit Captured Value
bits : 0 - 15 (16 bit)
access : read-only


ALOAD

16-bit Load Value, Asynchronous
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALOAD ALOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Load Value, Asynchronous
bits : 0 - 15 (16 bit)
access : read-write


ACURCNT

16-bit Timer Value, Asynchronous
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACURCNT ACURCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Counter Value
bits : 0 - 15 (16 bit)
access : read-only


STAT

Status
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STAT STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMEOUT CAPTURE BUSY PDOK CNTRST

TIMEOUT : Timeout Event Occurred
bits : 0 - 0 (1 bit)
access : read-only

CAPTURE : Capture Event Pending
bits : 1 - 1 (1 bit)
access : read-only

BUSY : Timer Busy
bits : 6 - 6 (1 bit)
access : read-only

PDOK : Clear Interrupt Register Synchronization
bits : 7 - 7 (1 bit)
access : read-only

CNTRST : Counter Reset Occurring
bits : 8 - 8 (1 bit)
access : read-only


PWMCTL

PWM Control Register
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMCTL PWMCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MATCH IDLESTATE

MATCH : PWM Match Enabled
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PWM_TOGGLE

PWM in toggle mode

1 : PWM_MATCH

PWM in match mode

End of enumeration elements list.

IDLESTATE : PWM Idle State
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : IDLE_LOW

PWM idles low

1 : IDLE_HIGH

PWM idles high

End of enumeration elements list.


PWMMATCH

PWM Match Value
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWMMATCH PWMMATCH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : PWM Match Value
bits : 0 - 15 (16 bit)
access : read-write


EVENTSELECT

Timer Event Selection Register
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EVENTSELECT EVENTSELECT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EVTRANGE

EVTRANGE : Event Select Range
bits : 0 - 5 (6 bit)
access : read-write


CURCNT

16-bit Timer Value
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CURCNT CURCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VALUE

VALUE : Current Count
bits : 0 - 15 (16 bit)
access : read-only


CTL

Control
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTL CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRE UP MODE EN CLK RLD EVTEN RSTEN SYNCBYP

PRE : Prescaler
bits : 0 - 1 (2 bit)
access : read-write

UP : Count up
bits : 2 - 2 (1 bit)
access : read-write

MODE : Timer Mode
bits : 3 - 3 (1 bit)
access : read-write

EN : Timer Enable
bits : 4 - 4 (1 bit)
access : read-write

CLK : Clock Select
bits : 5 - 6 (2 bit)
access : read-write

RLD : Reload Control
bits : 7 - 7 (1 bit)
access : read-write

EVTEN : Event Select
bits : 13 - 13 (1 bit)
access : read-write

RSTEN : Counter and Prescale Reset Enable
bits : 14 - 14 (1 bit)
access : read-write

SYNCBYP : Synchronization Bypass
bits : 15 - 15 (1 bit)
access : read-write


CLRINT

Clear Interrupt
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLRINT CLRINT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMEOUT EVTCAPT

TIMEOUT : Clear Timeout Interrupt
bits : 0 - 0 (1 bit)
access : write-only

EVTCAPT : Clear Captured Event Interrupt
bits : 1 - 1 (1 bit)
access : write-only



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