\n
address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected
Configuration Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BLKEN : Enable Bit for Crypto Block
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Enable
Enable Crypto Block
1 : Disable
Disable Crypto Block
End of enumeration elements list.
ENCR : Encrypt or Decrypt
bits : 1 - 1 (1 bit)
access : read-write
INDMAEN : Enable DMA Channel Request for Input Buffer
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : DMA_DISABLE_INBUF
Disable DMA Requesting for Input Buffer
1 : DMA_ENABLE_INBUF
Enable DMA Requesting for Input Buffer
End of enumeration elements list.
OUTDMAEN : Enable DMA Channel Request for Output Buffer
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : DMA_DISABLE_OUTBUF
Disable DMA Requesting for Output Buffer
1 : DMA_ENABLE_OUTBUF
Enable DMA Requesting for Output Buffer
End of enumeration elements list.
INFLUSH : Input Buffer Flush
bits : 4 - 4 (1 bit)
access : write-only
OUTFLUSH : Output Buffer Flush
bits : 5 - 5 (1 bit)
access : write-only
AESKEYLEN : Select Key Length for AES Cipher
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0 : AESKEYLEN128
Uses 128-bit long key
2 : AESKEYLEN256
Uses 256-bit long key
End of enumeration elements list.
KUWKeyLen : Key Length Key Wrap Unwrap
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
1 : LEN128
The key size of KUW key is 128 bits
2 : LEN256
The key size of KUW key is 256 bits
3 : LEN512
The key size of KUW key is 512 bits
End of enumeration elements list.
AES_BYTESWAP : Byteswap for AES Input
bits : 12 - 12 (1 bit)
access : read-write
SHA_BYTESWAP : Enable Key Wrap
bits : 13 - 13 (1 bit)
access : read-write
KEY_BYTESWAP : Use Key Unwrap Before HMAC
bits : 14 - 14 (1 bit)
access : read-write
PRKSTOREN : Enable PRKSTOR Commands
bits : 15 - 15 (1 bit)
access : read-write
ECBEN : Enable ECB Mode Operation
bits : 16 - 16 (1 bit)
access : read-write
CTREN : Enable CTR Mode Operation
bits : 17 - 17 (1 bit)
access : read-write
CBCEN : Enable CBC Mode Operation
bits : 18 - 18 (1 bit)
access : read-write
CCMEN : Enable CCM/CCM* Mode Operation
bits : 19 - 19 (1 bit)
access : read-write
CMACEN : Enable CMAC Mode Operation
bits : 20 - 20 (1 bit)
access : read-write
HMACEN : HMAC Enable
bits : 21 - 21 (1 bit)
access : read-write
SHA256EN : Enable SHA-256 Operation
bits : 25 - 25 (1 bit)
access : read-write
SHAINIT : Restarts SHA Computation
bits : 26 - 26 (1 bit)
access : read-write
RevID : Rev ID for Crypto
bits : 28 - 31 (4 bit)
access : read-only
Status Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INRDY : Input Buffer Status
bits : 0 - 0 (1 bit)
access : read-only
OUTRDY : Output Data Ready
bits : 1 - 1 (1 bit)
access : read-only
INOVR : Overflow in the Input Buffer
bits : 2 - 2 (1 bit)
access : read-write
SHADONE : SHA Computation Complete
bits : 5 - 5 (1 bit)
access : read-write
SHABUSY : SHA Busy. in Computation
bits : 6 - 6 (1 bit)
access : read-only
INWORDS : Number of Words in the Input Buffer
bits : 7 - 9 (3 bit)
access : read-only
OUTWORDS : Number of Words in the Output Buffer
bits : 10 - 12 (3 bit)
access : read-only
HMACBUSY : Status Bit Indicates HMAC Busy
bits : 13 - 13 (1 bit)
access : read-only
HMACDONE : Status Bit Indicates HMAC Done
bits : 14 - 14 (1 bit)
access : read-write
HMACMSGRDY : Status Bit Indicates HMAC is Message Ready
bits : 15 - 15 (1 bit)
access : read-write
PRKSTOR_CMD_DONE : Indicates Command Done for PrKStor
bits : 23 - 23 (1 bit)
access : read-write
PRKSTOR_CMD_FAIL : Indicates Last Command Issued Failed
bits : 24 - 24 (1 bit)
access : read-write
PRKSTOR_RET_STATUS : ECC Errors in the PRKSTOR_RETRIEVE Command
bits : 25 - 26 (2 bit)
access : read-only
CMD_ISSUED : Last Command Issued to PrKStor
bits : 27 - 30 (4 bit)
access : read-only
PRKSTOR_BUSY : Indicates PrKSTOR is Busy
bits : 31 - 31 (1 bit)
access : read-only
Input Buffer
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Input Buffer
bits : 0 - 31 (32 bit)
access : write-only
Output Buffer
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Output Buffer
bits : 0 - 31 (32 bit)
access : read-only
Nonce Bits [31:0]
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Word 0: Nonce Bits [31:0]
bits : 0 - 31 (32 bit)
access : read-write
Nonce Bits [63:32]
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Word 1: Nonce Bits [63:32]
bits : 0 - 31 (32 bit)
access : read-write
Nonce Bits [95:64]
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Word 2: Nonce Bits [95:64]
bits : 0 - 31 (32 bit)
access : read-write
Nonce Bits [127:96]
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Word 3: Nonce Bits [127:96]
bits : 0 - 31 (32 bit)
access : read-write
AES Key Bits [31:0]
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [3:0]
bits : 0 - 31 (32 bit)
access : write-only
AES Key Bits [63:32]
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [7:4]
bits : 0 - 31 (32 bit)
access : write-only
AES Key Bits [95:64]
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [11:8]
bits : 0 - 31 (32 bit)
access : write-only
AES Key Bits [127:96]
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [15:12]
bits : 0 - 31 (32 bit)
access : write-only
AES Key Bits [159:128]
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [19:16]
bits : 0 - 31 (32 bit)
access : write-only
Payload Data Length
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Length of Payload Data
bits : 0 - 19 (20 bit)
access : read-write
AES Key Bits [191:160]
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [23:20]
bits : 0 - 31 (32 bit)
access : write-only
AES Key Bits [223:192]
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [27:24]
bits : 0 - 31 (32 bit)
access : write-only
AES Key Bits [255:224]
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key: Bytes [31:28]
bits : 0 - 31 (32 bit)
access : write-only
Counter Initialization Vector
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Counter Initialization Value
bits : 0 - 19 (20 bit)
access : read-write
SHA Bits [31:0]
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH0 : Word 0: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Bits [63:32]
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH1 : Word 1: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Bits [95:64]
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH2 : Word 2: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Bits [127:96]
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH3 : Word 3: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Bits [159:128]
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH4 : Word 4: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Bits [191:160]
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH5 : Word 5: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Bits [223:192]
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH6 : Word 6: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Bits [255:224]
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SHAHASH7 : Word 7: SHA Hash
bits : 0 - 31 (32 bit)
access : read-only
SHA Last Word and Valid Bits Information
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
O_Last_Word : Last SHA Input Word
bits : 0 - 0 (1 bit)
access : read-write
O_Bits_Valid : Bits Valid in SHA Last Word Input
bits : 1 - 5 (5 bit)
access : read-write
NUM_VALID_BYTES
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NUM_VALID_BYTES : Number of Valid Bytes in CCM Last Data
bits : 0 - 3 (4 bit)
access : read-write
PRKSTOR Configuration
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY_INDEX : Index of Key in PRKSTOR
bits : 0 - 6 (7 bit)
access : read-write
CMD : Command Input for PRKSTOR
bits : 7 - 10 (4 bit)
access : read-write
Authentication Data Length
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Length of Associated Data
bits : 0 - 15 (16 bit)
access : read-write
Key Wrap Unwrap Register 0
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW0 : KUW [31:0]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 1
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW1 : KUW [63:32]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 2
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW2 : KUW [95:64]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 3
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW3 : KUW [127:96]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 4
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW4 : KUW [159:128]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 5
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW5 : KUW [191:160]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 6
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW6 : KUW [223:192]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 7
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW7 : KUW [255:224]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 8
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW8 : KUW [287:256]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 9
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW9 : KUW [319:288]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 10
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW10 : KUW [351:320]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 11
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW11 : KUW [383:352]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 12
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW12 : KUW [415:384]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 13
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW13 : KUW [447:416]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 14
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW14 : KUW [479:448]
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Register 15
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KUW15 : KUW [511:480]
bits : 0 - 31 (32 bit)
access : write-only
Interrupt Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INRDYEN : Enable Input Ready Interrupt
bits : 0 - 0 (1 bit)
access : read-write
OUTRDYEN : Enables the Output Ready Interrupt
bits : 1 - 1 (1 bit)
access : read-write
INOVREN : Enable Input Overflow Interrupt
bits : 2 - 2 (1 bit)
access : read-write
SHADONEN : Enable SHA_Done Interrupt
bits : 5 - 5 (1 bit)
access : read-write
HMACDONEEN : Interrupt Enable for HMAC Done
bits : 6 - 6 (1 bit)
access : read-write
HMACMSGRDYEN : Status Bit for HMAC Message Input Ready
bits : 7 - 7 (1 bit)
access : read-write
PRKSTRCMDONEEN : PRKSTOR CMD DONE INTEN
bits : 8 - 8 (1 bit)
access : read-write
Key Wrap Unwrap Validation String [63:32]
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
InitialValue0 : Initial Value
bits : 0 - 31 (32 bit)
access : write-only
Key Wrap Unwrap Validation String [31:0]
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
InitialValue1 : Initial Value
bits : 0 - 31 (32 bit)
access : write-only
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