Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected
Misc Clock Settings
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKMUX : Clock mux select
bits : 0 - 1 (2 bit)
access : read-write
CLKOUT : GPIO clock out select
bits : 3 - 6 (4 bit)
access : read-write
RCLKMUX : Flash reference clock and HPBUCK clock source mux
bits : 8 - 9 (2 bit)
access : read-write
PLL_IPSEL : SPLL source select mux
bits : 11 - 12 (2 bit)
access : read-write
Enumeration:
0 : PLL_HFOSC
Internal HF oscillator is selected
1 : PLL_HFXTAL
External HF XTAL oscillator is selected
2 : PLL_GPIO
GPIO_CLK input is selected
3 : PLL_GPIO1
GPIO_CLK input is selected
End of enumeration elements list.
LFXTALIE : Low frequency crystal interrupt enable
bits : 14 - 14 (1 bit)
access : read-write
HFXTALIE : High frequency crystal interrupt enable
bits : 15 - 15 (1 bit)
access : read-write
User Clock Gating Control
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPTCLK0OFF : GP Timer 0 user control
bits : 0 - 0 (1 bit)
access : read-write
GPTCLK1OFF : GP Timer 1 user control
bits : 1 - 1 (1 bit)
access : read-write
GPTCLK2OFF : GP Timer 2 user control
bits : 2 - 2 (1 bit)
access : read-write
UCLKI2COFF : I2C clock user control
bits : 3 - 3 (1 bit)
access : read-write
GPIOCLKOFF : GPIO clock control
bits : 4 - 4 (1 bit)
access : read-write
PERCLKOFF : This bit is used to disable all clocks connected to all peripherals
bits : 5 - 5 (1 bit)
access : read-write
TMRRGBCLKOFF : Timer RGB user control
bits : 6 - 6 (1 bit)
access : read-write
Clocking Status
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPLL : System PLL status
bits : 0 - 0 (1 bit)
access : read-only
SPLLLK : System PLL lock
bits : 1 - 1 (1 bit)
access : read-write
SPLLUNLK : System PLL unlock
bits : 2 - 2 (1 bit)
access : read-write
LFXTAL : LF crystal status
bits : 8 - 8 (1 bit)
access : read-only
LFXTALOK : LF crystal stable
bits : 9 - 9 (1 bit)
access : read-write
LFXTALNOK : LF crystal not stable
bits : 10 - 10 (1 bit)
access : read-write
HFXTAL : HF crystal status
bits : 12 - 12 (1 bit)
access : read-only
HFXTALOK : HF crystal stable
bits : 13 - 13 (1 bit)
access : read-write
HFXTALNOK : HF crystal not stable
bits : 14 - 14 (1 bit)
access : read-write
Clock Dividers
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HCLKDIVCNT : HCLK divide count
bits : 0 - 5 (6 bit)
access : read-write
PCLKDIVCNT : PCLK divide count
bits : 8 - 13 (6 bit)
access : read-write
ACLKDIVCNT : ACLK Divide Count
bits : 16 - 24 (9 bit)
access : read-write
HF Oscillator Divided Clock Select
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HFOSCAUTODIV_EN : HF Oscillator auto divide by one clock selection during wakeup from Flexi power mode
bits : 0 - 0 (1 bit)
access : read-write
HFOSCDIVCLKSEL : HF Oscillator divided clock select
bits : 1 - 3 (3 bit)
access : read-write
System PLL
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPLLNSEL : System PLL N multiplier
bits : 0 - 4 (5 bit)
access : read-write
SPLLDIV2 : System PLL division by 2
bits : 8 - 8 (1 bit)
access : read-write
SPLLEN : System PLL enable
bits : 9 - 9 (1 bit)
access : read-write
SPLLIE : System PLL interrupt enable
bits : 10 - 10 (1 bit)
access : read-write
SPLLMSEL : System PLL M Divider
bits : 11 - 14 (4 bit)
access : read-write
SPLLMUL2 : System PLL multiply by 2
bits : 16 - 16 (1 bit)
access : read-write
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