Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection : not protected
I2C Master Slave address
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RS : Receive or Send in START condition. This bit work with START, RUN or HS, RUN.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : 0
Transmitter
1 : 1
Receiver
End of enumeration elements list.
SA : Slave Address
bits : 1 - 8 (8 bit)
access : read-write
I2C_SCL Low Period
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCL_LP : I2C master SCL low time period register. The range of SCL_LP[3:0] is 1~14.
bits : 0 - 3 (4 bit)
access : read-write
I2C_SCL High Period
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCL_HP : I2C master SCL high time period register. The range of SCL_HP[3:0] is 2~15.
bits : 0 - 3 (4 bit)
access : read-write
I2C_DAT Setup Period
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDA_SETUP : I2C Master SDA setup time register. The range of SDA_SETUP[3:0] is 2~15.
bits : 0 - 3 (4 bit)
access : read-write
I2C Master Interrupt
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I2CMIE : I2C Master interrupt enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : 0
Disable
1 : 1
Enable
End of enumeration elements list.
I2CMIF : I2C MASTER MODULE interrupt flag
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
I2C Master Interrupt occured. Write 1 to clean this bit.
End of enumeration elements list.
I2C Bus Select
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I2CBSEL : I2C Bus select
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : 0
I2C_SCL connect to P0_04 and I2C_SCL connect to P0_05.
1 : 1
I2C_SCL connect to P0_10 and I2C_SCL connect to P0_11.
End of enumeration elements list.
I2C Master Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
RUN : This bit work with START, STOP, ACK and HS.
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
0 : 0
No effect
1 : 1
Run a transmission
End of enumeration elements list.
START : Send START follow by Slave Address and SEND or RECEIVE. This bit need with RUN and RS to work.
bits : 1 - 2 (2 bit)
access : write-only
Enumeration:
0 : 0
No effect
1 : 1
Send START follow by Slave Address and SEND or RECEIVE.
End of enumeration elements list.
STOP : Send STOP and return to Idle mode, and transmission speed switch to Standard.
bits : 2 - 4 (3 bit)
access : write-only
Enumeration:
0 : 0
No effect
1 : 1
Send STOP
End of enumeration elements list.
ACK : Master in Receive mode need set this bit. This bit must work with RUN bit.
bits : 3 - 6 (4 bit)
access : write-only
Enumeration:
0 : 0
Read data follow by NAK
1 : 1
Read data follow by ACK
End of enumeration elements list.
HS : Transmission speed switch to High-speed.
bits : 4 - 8 (5 bit)
access : write-only
Enumeration:
0 : 0
No effect
1 : 1
Send START follow by Slave Address and Switching to High-speed.
End of enumeration elements list.
SLRST : Slave Reset
bits : 6 - 12 (7 bit)
access : write-only
Enumeration:
0 : 0
No effect
1 : 1
Reset slaves connected to I2C bus by generating 9 I2C_SCK clocks followed by STOP. This bit need with RUN to work.
End of enumeration elements list.
RSTB : Reset Bit for I2C Master
bits : 7 - 14 (8 bit)
access : write-only
Enumeration:
0 : 0
No effect
1 : 1
Reset I2C controller
End of enumeration elements list.
I2C Master Slave Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
alternate_register : I2CMCR
reset_Mask : 0x0
BUSY : I2C Master is receiving, or transmitting data on the bus and other bits of I2CMSR are no valid.
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : 0
I2C Master controller not busy
1 : 1
I2C Master controller is busy
End of enumeration elements list.
ERROR : Due the last operation an error occurred, that include slave address wasn't acknowledged, transmitted data wasn't acknowledged, or I2C Bus controller lost the arbitration.
bits : 1 - 2 (2 bit)
access : read-only
Enumeration:
0 : 0
Normal
1 : 1
Some error occurred
End of enumeration elements list.
DATA_ACK : The acknowledged of DATA
bits : 3 - 6 (4 bit)
access : read-only
Enumeration:
0 : 0
DATA with NAK
1 : 1
DATA with ACK
End of enumeration elements list.
ARB_LOST : Due the last operation I2C Bus controller lost the arbitration
bits : 4 - 8 (5 bit)
access : read-only
Enumeration:
0 : 0
not arbitration lost
1 : 1
has arbitration lost
End of enumeration elements list.
IDLE : I2C Bus controller is in the idle state
bits : 5 - 10 (6 bit)
access : read-only
Enumeration:
0 : 0
I2C Bus controller is not in idle state
1 : 1
I2C Bus controller is in idle state
End of enumeration elements list.
BUS_BUSY : This bit is set by START conditions and reset by STOP conditions
bits : 6 - 12 (7 bit)
access : read-only
Enumeration:
0 : 0
Bus not busy
1 : 1
Bus is busy
End of enumeration elements list.
I2C Master transmitted data Buffer
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
D : I2C Master write SEND data or read RECEIVE data
bits : 0 - 7 (8 bit)
access : read-write
I2C Master Timer Period
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTP : I2C master timer period register. The range of MTP[6:0] is 1~63
bits : 0 - 6 (7 bit)
access : read-write
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