address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
Recieve and Transmit Data Value
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
Baudrate Divider
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
UART Status Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
TXBF : TX Buffer Full
bits : 0 - 0
access : read-only
RXBF : RX Buffer Full
bits : 1 - 2
access : read-only
TXOV : TX Buffer Overun (write 1 to clear)
bits : 2 - 4
RXOV : RX Buffer Overun (write 1 to clear)
bits : 3 - 6
UART Control Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
TXEN : TX Enable
bits : 0 - 0
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
RXEN : RX Enable
bits : 1 - 2
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TXINT : TX Interrupt Enable
bits : 2 - 4
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
RXINT : RX Interrupt Enable
bits : 3 - 6
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
TXOVINT : TX Overrun Interrupt Enable
bits : 4 - 8
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
RVOVINT : RX Overrun Interrupt Enable
bits : 5 - 10
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
HSTX : High Speed Test Mode for TX only
bits : 6 - 12
Enumeration:
0 : Disable
Disabled
1 : Enable
Enabled
End of enumeration elements list.
UART Interrupt Status Register
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
TXINT : TX interrupt
bits : 0 - 0
RXINT : RX interrupt
bits : 1 - 2
TXOV : TX Overrun interrupt
bits : 2 - 4
RXOV : RX Overrun interrupt
bits : 3 - 6
UART Interrupt CLEAR Register
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
alternate_register : INTSTATUS
TXINT : TX interrupt
bits : 0 - 0
RXINT : RX interrupt
bits : 1 - 2
TXOV : TX Overrun interrupt
bits : 2 - 4
RXOV : RX Overrun interrupt
bits : 3 - 6
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