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Timer

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x3C byte (0x0)
mem_usage : registers
protection : not protected

Registers

TIMER1LOAD

TIMER1RIS

TIMER1MIS

TIMER1BGLOAD

TIMER2LOAD

TIMER2VALUE

TIMER2CONTROL

TIMER2INTCLR

TIMER2RIS

TIMER2MIS

TIMER2BGLOAD

TIMER1VALUE

TIMER1CONTROL

TIMER1INTCLR


TIMER1LOAD

Timer 1 Load Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1LOAD TIMER1LOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIMER1RIS

Timer 1 Raw Interrupt Status Register
address_offset : 0x10 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TIMER1RIS TIMER1RIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RIS

RIS : Raw Timer interrupt
bits : 0 - 0 (1 bit)


TIMER1MIS

Timer 1 Mask Interrupt Status Register
address_offset : 0x14 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TIMER1MIS TIMER1MIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIS

MIS : Masked Timer interrupt
bits : 0 - 0 (1 bit)


TIMER1BGLOAD

Timer 1 Background Load Register
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1BGLOAD TIMER1BGLOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIMER2LOAD

Timer 2 Load Register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2LOAD TIMER2LOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIMER2VALUE

Timer 2 Value Register
address_offset : 0x24 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TIMER2VALUE TIMER2VALUE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIMER2CONTROL

Timer 2 Control Register
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2CONTROL TIMER2CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OneShotCount TimerSize TimerPre InterruptEnable TimerMode TimerEnable

OneShotCount : Selects one-shot or wrapping counter mode.
bits : 0 - 0 (1 bit)

Enumeration:

0 : Wrapping

Wrapping counter mode

1 : OneShot

One-shot counter mode

End of enumeration elements list.

TimerSize : Selects 16-bit or 32- bit counter operation.
bits : 1 - 2 (2 bit)

Enumeration:

0 : 16-bit

16-bit counter mode

1 : 32-bit

32-bit counter mode

End of enumeration elements list.

TimerPre : Timer prescale bits.
bits : 2 - 5 (4 bit)

Enumeration:

0 : divided by 1

clock is divided by 1

1 : divided by 16

clock is divided by 16

2 : divided by 256

clock is divided by 256

End of enumeration elements list.

InterruptEnable : Interrupt Enable bit.
bits : 5 - 10 (6 bit)

Enumeration:

0 : Disable

Interrupt is disabled.

1 : Enable

Interrupt is enabled.

End of enumeration elements list.

TimerMode : Timer Mode bit.
bits : 6 - 12 (7 bit)

Enumeration:

0 : Free-Running

Free-Running timer mode.

1 : Periodic

Periodic timer mode.

End of enumeration elements list.

TimerEnable : Timer Enable Enable bit.
bits : 7 - 7 (1 bit)

Enumeration:

0 : Disable

Timer is disabled.

1 : Enable

Timer is enabled.

End of enumeration elements list.


TIMER2INTCLR

Timer 2 Interrupt Clear Register
address_offset : 0x2C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TIMER2INTCLR TIMER2INTCLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT

INT : interrupt
bits : 0 - 0 (1 bit)


TIMER2RIS

Timer 2 Raw Interrupt Status Register
address_offset : 0x30 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TIMER2RIS TIMER2RIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RIS

RIS : Raw Timer interrupt
bits : 0 - 0 (1 bit)


TIMER2MIS

Timer 2 Mask Interrupt Status Register
address_offset : 0x34 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TIMER2MIS TIMER2MIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MIS

MIS : Masked Timer interrupt
bits : 0 - 0 (1 bit)


TIMER2BGLOAD

Timer 2 Background Load Register
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2BGLOAD TIMER2BGLOAD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIMER1VALUE

Timer 1 Value Register
address_offset : 0x4 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TIMER1VALUE TIMER1VALUE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TIMER1CONTROL

Timer 1 Control Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1CONTROL TIMER1CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OneShotCount TimerSize TimerPre InterruptEnable TimerMode TimerEnable

OneShotCount : Selects one-shot or wrapping counter mode.
bits : 0 - 0 (1 bit)

Enumeration:

0 : Wrapping

Wrapping counter mode

1 : OneShot

One-shot counter mode

End of enumeration elements list.

TimerSize : Selects 16-bit or 32- bit counter operation.
bits : 1 - 2 (2 bit)

Enumeration:

0 : 16-bit

16-bit counter mode

1 : 32-bit

32-bit counter mode

End of enumeration elements list.

TimerPre : Timer prescale bits
bits : 2 - 5 (4 bit)

Enumeration:

0 : divided by 1

clock is divided by 1

1 : divided by 16

clock is divided by 16

2 : divided by 256

clock is divided by 256

End of enumeration elements list.

InterruptEnable : Interrupt Enable bit
bits : 5 - 10 (6 bit)

Enumeration:

0 : Disable

Interrupt is disabled.

1 : Enable

Interrupt is enabled.

End of enumeration elements list.

TimerMode : Timer Mode bit
bits : 6 - 12 (7 bit)

Enumeration:

0 : Free-Running

Free-Running timer mode.

1 : Periodic

Periodic timer mode.

End of enumeration elements list.

TimerEnable : Timer Enable Enable bit.
bits : 7 - 14 (8 bit)

Enumeration:

0 : Disable

Timer is disabled.

1 : Enable

Timer is enabled.

End of enumeration elements list.


TIMER1INTCLR

Timer 1 Interrupt Clear Register
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TIMER1INTCLR TIMER1INTCLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT

INT : interrupt
bits : 0 - 0 (1 bit)



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