\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
MPC Control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
bit[4] : Security error response configuration
bits : 4 - 4 (1 bit)
Enumeration:
0 : RAZ-WI
Read-As-Zero - Writes ignored
1 : BUSERROR
Bus Error
End of enumeration elements list.
bit[6] : Data interface gating request
bits : 6 - 6 (1 bit)
bit[7] : Data interface gating acknowledge (RO)
bits : 7 - 7 (1 bit)
bit[8] : Auto-increment
bits : 8 - 8 (1 bit)
bit[31] : Security lockdown
bits : 31 - 31 (1 bit)
Maximum value of block based index register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
bit[3_0] : Block size
bits : 0 - 3 (4 bit)
bit[31] : Initialization in progress
bits : 31 - 31 (1 bit)
Block Configuration
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Index value for accessing block based look up table
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Block based gating Look Up Table
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Interrupt state
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
bit[0] : mpc_irq triggered
bits : 0 - 0 (1 bit)
Interrupt clear
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
bit[0] : mpc_irq clear (cleared automatically)
bits : 0 - 0 (1 bit)
Interrupt enable
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
bit[0] : mpc_irq enable. Bits are valid when mpc_irq triggered is set
bits : 0 - 0 (1 bit)
Interrupt information 1
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Interrupt information 2
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
bit[15_0] : hmaster
bits : 0 - 15 (16 bit)
bit[16] : hnonsec
bits : 16 - 16 (1 bit)
bit[17] : cfg_ns
bits : 17 - 17 (1 bit)
Interrupt set. Debug purpose only
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
bit[0] : mpc_irq set. Debug purpose only
bits : 0 - 0 (1 bit)
Peripheral ID 4
address_offset : 0xFD0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
bit[3_0] : jep106_c_code
bits : 0 - 3 (4 bit)
bit[7_4] : block count
bits : 4 - 7 (4 bit)
Peripheral ID 5
address_offset : 0xFD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
bit[3_0] : Part number
bits : 0 - 3 (4 bit)
bit[7_4] : jep106_id_3_0
bits : 4 - 7 (4 bit)
Peripheral ID 6
address_offset : 0xFD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Peripheral ID 7
address_offset : 0xFDC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Peripheral ID 0
address_offset : 0xFE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Peripheral ID 1
address_offset : 0xFE4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Peripheral ID 2
address_offset : 0xFE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
bit[3_0] : Part number
bits : 0 - 3 (4 bit)
bit[7_4] : jep106_id_3_0
bits : 4 - 7 (4 bit)
Peripheral ID 3
address_offset : 0xFEC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
bit[3_0] : Customer modification number
bits : 0 - 3 (4 bit)
bit[7_4] : ECO revision number
bits : 4 - 7 (4 bit)
Component ID 0
address_offset : 0xFF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Component ID 1
address_offset : 0xFF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Component ID 2
address_offset : 0xFF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Component ID 3
address_offset : 0xFFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
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