\n

Timer

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected

Registers

GPTRESET

GPTALARM0

GPTALARM1

GPTINTR

GPTCOUNTER

GPTINTM

GPTINTC


GPTRESET

Control Reset Register
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

GPTRESET GPTRESET read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPTRESET

GPTRESET : CPU0 interrupt status
bits : 0 - 1 (2 bit)


GPTALARM0

ALARM0 data value register
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPTALARM0 GPTALARM0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPTALARM0_DATA GPTALARM0_DATA GPTALARM0_DATA GPTALARM0_DATA GPTALARM0_DATA

GPTALARM0_DATA : Value that triggers the ALARM0 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM0_DATA : Value that triggers the ALARM0 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM0_DATA : Value that triggers the ALARM0 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM0_DATA : Value that triggers the ALARM0 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM0_DATA : Value that triggers the ALARM0 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)


GPTALARM1

ALARM1 data value register
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPTALARM1 GPTALARM1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPTALARM1_DATA GPTALARM1_DATA GPTALARM1_DATA GPTALARM1_DATA GPTALARM1_DATA

GPTALARM1_DATA : Value that triggers the ALARM1 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM1_DATA : Value that triggers the ALARM1 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM1_DATA : Value that triggers the ALARM1 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM1_DATA : Value that triggers the ALARM1 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)

GPTALARM1_DATA : Value that triggers the ALARM1 interrupt when the counter reaches that value
bits : 0 - 31 (32 bit)


GPTINTR

Raw interrupt status register
address_offset : 0x18 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

GPTINTR GPTINTR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPTINTR

GPTINTR : Raw interrupt state, before masking of GPTINTR interrupt
bits : 0 - 2 (3 bit)


GPTCOUNTER

Counter data value register
address_offset : 0x1C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

GPTCOUNTER GPTCOUNTER read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPTCOUNTER

GPTCOUNTER : Current value of 32-bit Timer Counter
bits : 0 - 31 (32 bit)


GPTINTM

Masked interrupt status register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPTINTM GPTINTM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPTINTM

GPTINTM : Current masked status of the interrupt
bits : 0 - 1 (2 bit)


GPTINTC

Interrupt clear register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPTINTC GPTINTC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPTINTC

GPTINTC : Writing 0b1 disables the ALARM[n] interrupt
bits : 0 - 1 (2 bit)



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