\n
address_offset : 0x0 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
PWM Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OUTPUT_SET : Start stop bit for the pwm_output
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : Enabled
Generate programmed waveform on pwm_output
0 : Disabled
Set pwm_output continually high
End of enumeration elements list.
PWM Enable Interrupt Register
address_offset : 0x10 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
Enable_BIT : Determines whether the write accesses the Interrupt Enable register
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
1 : Enabled
Enable the Interrupt generation
End of enumeration elements list.
PWM Disable Interrupt Register
address_offset : 0x14 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
Disable_BIT : Determines whether the write accesses the Interrupt Disable register
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
1 : Disabled
Disable the Interrupt generation
End of enumeration elements list.
PWM Read Intr Enable Register.Reading from this address accesses the current state of the interrupt control registers
address_offset : 0x18 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Enable_BIT : Check whether the Interrupt is Enabled
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
1 : Enabled
Interrupt is Enabled
End of enumeration elements list.
PWM Read Interrupt Status Register
address_offset : 0x1C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Status : Reading from this address returns the current state of the PWM Interrupt output, and then sets the bit low
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
1 : Active
Interrupt is active
0 : Not active
Interrupt is not active
End of enumeration elements list.
PWM Period Register. Number of system clock cycles indicating the period of PWM cycle.The minimum and maximum values have special significance. 0x0: pwm_output continually high 0xFFFFFFFF: pwm_output continually low
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWM High Iime Register. This register contains the number of system clock cycles for during which the pwm_output should be kept high in a PWM cycle
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
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