\n
address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : Enable
bits : 0 - 0 (1 bit)
EXTIN : External Input as Enable
bits : 1 - 2 (2 bit)
EXTCLK : External Clock Enable
bits : 2 - 4 (3 bit)
INTEN : Interrupt Enable
bits : 3 - 6 (4 bit)
Current Timer Counter Value
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Counter Reload Value
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Timer Interrupt status Register
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Timer Interrupt clear Register
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
alternate_register : INTSTATUS
reset_Mask : 0x0
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