\n
address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected
Configuration Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WBDIS : Write Back Disable
bits : 0 - 0 (1 bit)
access : read-write
EOMDIS : End of Monitoring Disable
bits : 1 - 1 (1 bit)
access : read-write
SLBDIS : Secondary List Branching Disable
bits : 2 - 2 (1 bit)
access : read-write
BBC : Bus Burden Control
bits : 4 - 7 (4 bit)
access : read-write
ASCD : Automatic Switch To Compare Digest
bits : 8 - 8 (1 bit)
access : read-write
DUALBUFF : Dual Input Buffer
bits : 9 - 9 (1 bit)
access : read-write
UIHASH : User Initial Hash Value
bits : 12 - 12 (1 bit)
access : read-write
UALGO : User SHA Algorithm
bits : 13 - 15 (3 bit)
access : read-write
Enumeration:
0x0 : SHA1
SHA1 algorithm processed
0x1 : SHA256
SHA256 algorithm processed
0x4 : SHA224
SHA224 algorithm processed
End of enumeration elements list.
HAPROT : Region Hash Area Protection
bits : 16 - 21 (6 bit)
access : read-write
DAPROT : Region Descriptor Area Protection
bits : 24 - 29 (6 bit)
access : read-write
Interrupt Enable Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
RHC : Region Hash Completed Interrupt Enable
bits : 0 - 3 (4 bit)
access : write-only
RDM : Region Digest Mismatch Interrupt Enable
bits : 4 - 7 (4 bit)
access : write-only
RBE : Region Bus Error Interrupt Enable
bits : 8 - 11 (4 bit)
access : write-only
RWC : Region Wrap Condition detected Interrupt Enable
bits : 12 - 15 (4 bit)
access : write-only
REC : Region End bit Condition Detected Interrupt Enable
bits : 16 - 19 (4 bit)
access : write-only
RSU : Region Status Updated Interrupt Disable
bits : 20 - 23 (4 bit)
access : write-only
URAD : Undefined Register Access Detection Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
Interrupt Disable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
RHC : Region Hash Completed Interrupt Disable
bits : 0 - 3 (4 bit)
access : write-only
RDM : Region Digest Mismatch Interrupt Disable
bits : 4 - 7 (4 bit)
access : write-only
RBE : Region Bus Error Interrupt Disable
bits : 8 - 11 (4 bit)
access : write-only
RWC : Region Wrap Condition Detected Interrupt Disable
bits : 12 - 15 (4 bit)
access : write-only
REC : Region End bit Condition detected Interrupt Disable
bits : 16 - 19 (4 bit)
access : write-only
RSU : Region Status Updated Interrupt Disable
bits : 20 - 23 (4 bit)
access : write-only
URAD : Undefined Register Access Detection Interrupt Disable
bits : 24 - 24 (1 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
Interrupt Mask Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RHC : Region Hash Completed Interrupt Mask
bits : 0 - 3 (4 bit)
access : read-only
RDM : Region Digest Mismatch Interrupt Mask
bits : 4 - 7 (4 bit)
access : read-only
RBE : Region Bus Error Interrupt Mask
bits : 8 - 11 (4 bit)
access : read-only
RWC : Region Wrap Condition Detected Interrupt Mask
bits : 12 - 15 (4 bit)
access : read-only
REC : Region End bit Condition Detected Interrupt Mask
bits : 16 - 19 (4 bit)
access : read-only
RSU : Region Status Updated Interrupt Mask
bits : 20 - 23 (4 bit)
access : read-only
URAD : Undefined Register Access Detection Interrupt Mask
bits : 24 - 24 (1 bit)
access : read-only
Interrupt Status Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RHC : Region Hash Completed
bits : 0 - 3 (4 bit)
access : read-only
RDM : Region Digest Mismatch
bits : 4 - 7 (4 bit)
access : read-only
RBE : Region Bus Error
bits : 8 - 11 (4 bit)
access : read-only
RWC : Region Wrap Condition Detected
bits : 12 - 15 (4 bit)
access : read-only
REC : Region End bit Condition Detected
bits : 16 - 19 (4 bit)
access : read-only
RSU : Region Status Updated Detected
bits : 20 - 23 (4 bit)
access : read-only
URAD : Undefined Register Access Detection Status
bits : 24 - 24 (1 bit)
access : read-only
User Initial Hash Value 0 Register
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
Undefined Access Status Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
URAT : Undefined Register Access Trace
bits : 0 - 2 (3 bit)
access : read-only
Enumeration:
0x0 : UNSPEC_STRUCT_MEMBER
Unspecified structure member set to one detected when the descriptor is loaded.
0x1 : ICM_CFG_MODIFIED
ICM_CFG modified during active monitoring.
0x2 : ICM_DSCR_MODIFIED
ICM_DSCR modified during active monitoring.
0x3 : ICM_HASH_MODIFIED
ICM_HASH modified during active monitoring
0x4 : READ_ACCESS
Write-only register read access
End of enumeration elements list.
User Initial Hash Value 0 Register
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
Region Descriptor Area Start Address Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DASA : Descriptor Area Start Address
bits : 6 - 31 (26 bit)
access : read-write
Region Hash Area Start Address Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HASA : Hash Area Start Address
bits : 7 - 31 (25 bit)
access : read-write
User Initial Hash Value 0 Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ENABLE : ICM Enable
bits : 0 - 0 (1 bit)
access : write-only
DISABLE : ICM Disable Register
bits : 1 - 1 (1 bit)
access : write-only
SWRST : Software Reset
bits : 2 - 2 (1 bit)
access : write-only
REHASH : Recompute Internal Hash
bits : 4 - 7 (4 bit)
access : write-only
RMDIS : Region Monitoring Disable
bits : 8 - 11 (4 bit)
access : write-only
RMEN : Region Monitoring Enable
bits : 12 - 15 (4 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ENABLE : ICM Controller Enable Register
bits : 0 - 0 (1 bit)
access : write-only
RAWRMDIS : RAW Region Monitoring Disabled Status
bits : 8 - 11 (4 bit)
access : write-only
RMDIS : Region Monitoring Disabled Status
bits : 12 - 15 (4 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
User Initial Hash Value 0 Register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VAL : Initial Hash Value
bits : 0 - 31 (32 bit)
access : write-only
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.