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OPAMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

OPAMP1_CSR

OPAMP2_CSR

OPAMP2_OTR

OPAMP2_HSOTR

OPAMP1_OTR

OPAMP1_HSOTR


OPAMP1_CSR

OPAMP1 control/status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_CSR OPAMP1_CSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAEN FORCE_VP VP_SEL VM_SEL OPAHSM CALON CALSEL PGA_GAIN USERTRIM TSTREF CALOUT

OPAEN : Operational amplifier Enable
bits : 0 - 0 (1 bit)
access : read-write

FORCE_VP : Force internal reference on VP (reserved for test
bits : 1 - 1 (1 bit)
access : read-write

VP_SEL : Operational amplifier PGA mode
bits : 2 - 3 (2 bit)
access : read-write

VM_SEL : Inverting input selection
bits : 5 - 6 (2 bit)
access : read-write

OPAHSM : Operational amplifier high-speed mode
bits : 8 - 8 (1 bit)
access : read-write

CALON : Calibration mode enabled
bits : 11 - 11 (1 bit)
access : read-write

CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write

PGA_GAIN : allows to switch from AOP offset trimmed values to AOP offset
bits : 14 - 17 (4 bit)
access : read-write

USERTRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write

TSTREF : OPAMP calibration reference voltage output control (reserved for test)
bits : 29 - 29 (1 bit)
access : read-write

CALOUT : Operational amplifier calibration output
bits : 30 - 30 (1 bit)
access : read-only


OPAMP2_CSR

OPAMP2 control/status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_CSR OPAMP2_CSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAEN FORCE_VP VM_SEL OPAHSM CALON CALSEL PGA_GAIN USERTRIM TSTREF CALOUT

OPAEN : Operational amplifier Enable
bits : 0 - 0 (1 bit)
access : read-write

FORCE_VP : Force internal reference on VP (reserved for test)
bits : 1 - 1 (1 bit)
access : read-write

VM_SEL : Inverting input selection
bits : 5 - 6 (2 bit)
access : read-write

OPAHSM : Operational amplifier high-speed mode
bits : 8 - 8 (1 bit)
access : read-write

CALON : Calibration mode enabled
bits : 11 - 11 (1 bit)
access : read-write

CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write

PGA_GAIN : Operational amplifier Programmable amplifier gain value
bits : 14 - 17 (4 bit)
access : read-write

USERTRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write

TSTREF : OPAMP calibration reference voltage output control (reserved for test)
bits : 29 - 29 (1 bit)
access : read-write

CALOUT : Operational amplifier calibration output
bits : 30 - 30 (1 bit)
access : read-only


OPAMP2_OTR

OPAMP2 offset trimming register in normal mode
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_OTR OPAMP2_OTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMOFFSETN TRIMOFFSETP

TRIMOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)


OPAMP2_HSOTR

OPAMP2 offset trimming register in low-power mode
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_HSOTR OPAMP2_HSOTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMLPOFFSETN TRIMLPOFFSETP

TRIMLPOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMLPOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)


OPAMP1_OTR

OPAMP1 offset trimming register in normal mode
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_OTR OPAMP1_OTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMOFFSETN TRIMOFFSETP

TRIMOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)


OPAMP1_HSOTR

OPAMP1 offset trimming register in low-power mode
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_HSOTR OPAMP1_HSOTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMLPOFFSETN TRIMLPOFFSETP

TRIMLPOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMLPOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)



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