\n
address_offset : 0x0 Bytes (0x0)
size : 0x50 byte (0x0)
mem_usage : registers
protection : not protected
ADC status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMO : Analog monitor event occrs
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
no analog monitor event
#1 : 1
analog monitor event occurs,write 0 to clear
End of enumeration elements list.
EOC : Regular group conversion completed flag
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Regular group conversion not completed
#1 : 1
Regular group conversion completed,write 0 or Read ADC_RDR to clear
End of enumeration elements list.
IEOC : Injection group conversion completed flag
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Injection group conversion not completed
#1 : 1
Injection group conversion completed,write 0 to clear
End of enumeration elements list.
IDLE : ADC idle state indicate(is useful for sleep function)
bits : 3 - 3 (1 bit)
access : Read-Only
Enumeration:
#0 : 0
ADC not in idle state
#1 : 1
ADC is in idle state
End of enumeration elements list.
ADC Sample time setting register 2
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPT0 : Sample time for Channel 0
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT1 : Sample time for Channel 1
bits : 3 - 5 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT2 : Sample time for Channel 2
bits : 6 - 8 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT3 : Sample time for Channel 3
bits : 9 - 11 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT4 : Sample time for Channel 4
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT5 : Sample time for Channel 5
bits : 15 - 17 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT6 : Sample time for Channel 6
bits : 18 - 20 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT7 : Sample time for Channel 7
bits : 21 - 23 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT8 : Sample time for Channel 8
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT9 : Sample time for Channel 9
bits : 27 - 29 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
ADC Injection Group data Register(n)
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDR : Injection group data Value
bits : 0 - 11 (12 bit)
access : read-only
AWD High threshold register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AWDH : High threshold value for analog watchdog
bits : 0 - 11 (12 bit)
access : read-write
ADC Injection Group Offset Register(n)
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOFR : Injection group offset Value
bits : 0 - 11 (12 bit)
access : read-write
AWD Low threshold register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AWDL : Low threshold value for analog watchdog
bits : 0 - 11 (12 bit)
access : read-write
ADC regular group sequence configure register 1
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSQ13 : channel selection for regular group 13
bits : 0 - 4 (5 bit)
access : read-write
RSQ14 : channel selection for regular group 14
bits : 5 - 9 (5 bit)
access : read-write
RSQ15 : channel selection for regular group 15
bits : 10 - 14 (5 bit)
access : read-write
RSQ16 : channel selection for regular group 16
bits : 15 - 19 (5 bit)
access : read-write
RSQL : length of regular group
bits : 20 - 23 (4 bit)
access : read-write
ADC regular group sequence configure register 2
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSQ7 : channel selection for regular group 7
bits : 0 - 4 (5 bit)
access : read-write
RSQ8 : channel selection for regular group 8
bits : 5 - 9 (5 bit)
access : read-write
RSQ9 : channel selection for regular group 9
bits : 10 - 14 (5 bit)
access : read-write
RSQ10 : channel selection for regular group 10
bits : 15 - 19 (5 bit)
access : read-write
RSQ11 : channel selection for regular group 11
bits : 20 - 24 (5 bit)
access : read-write
RSQ12 : channel selection for regular group 12
bits : 25 - 29 (5 bit)
access : read-write
ADC regular group sequence configure register 3
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSQ1 : channel selection for regular group 1
bits : 0 - 4 (5 bit)
access : read-write
RSQ2 : channel selection for regular group 2
bits : 5 - 9 (5 bit)
access : read-write
RSQ3 : channel selection for regular group 3
bits : 10 - 14 (5 bit)
access : read-write
RSQ4 : channel selection for regular group 4
bits : 15 - 19 (5 bit)
access : read-write
RSQ5 : channel selection for regular group 5
bits : 20 - 24 (5 bit)
access : read-write
RSQ6 : channel selection for regular group 6
bits : 25 - 29 (5 bit)
access : read-write
ADC injection group sequence configure register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISQ1 : channel selection for injection group 1
bits : 0 - 4 (5 bit)
access : read-write
ISQ2 : channel selection for injection group 2
bits : 5 - 9 (5 bit)
access : read-write
ISQ3 : channel selection for injection group 3
bits : 10 - 14 (5 bit)
access : read-write
ISQ4 : channel selection for injection group 4
bits : 15 - 19 (5 bit)
access : read-write
ISQL : length of injection group
bits : 20 - 21 (2 bit)
access : read-write
ADC control register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AMOCH : Analog monitor detecting channel
bits : 0 - 4 (5 bit)
access : read-write
AMOSGL : Analog monitor detecting channel
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
AMO used in All channels
#1 : 1
AMO function used in single channel defined in AMOCH register
End of enumeration elements list.
IAMOEN : Injection Group Analog Monitor Detect function Enable
bits : 6 - 6 (1 bit)
access : read-write
AMOEN : Regular Group Analog Monitor Detect function Enable
bits : 7 - 7 (1 bit)
access : read-write
DISCNUM : Discontinuous conversion length of channel
bits : 8 - 10 (3 bit)
access : read-write
IAUTO : Injection Group Automatic conversion
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
Injection group automatic conversion disabled
#1 : 1
Injection group automatic conversion enabled
End of enumeration elements list.
IDISCEN : Discontinous mode on injected channels
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Injection group Discontinous mode disabled
#1 : 1
Injection group Discontinous mode enabled
End of enumeration elements list.
DISCEN : Discontinous mode on regular channels
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
regular group Discontinous mode disabled
#1 : 1
regular group Discontinous mode enabled
End of enumeration elements list.
CONT : Continuous conversion
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
Single conversion mode
#1 : 1
continuous conversion mode
End of enumeration elements list.
SCAN : Scan Mode
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Scan mode disabled
#1 : 1
Scan mode enabled
End of enumeration elements list.
EOCIE : EOC interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
EOC interrupt Disabled
#1 : 1
EOC interrupt Enabled, An interrupt is generated when the EOC bit is set
End of enumeration elements list.
IEOCIE : IEOC interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
IEOC interrupt Disabled
#1 : 1
IEOC interrupt Enabled, An interrupt is generated when the IEOC bit is set
End of enumeration elements list.
AMOIE : AMO interrupt Enable
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
AMO interrupt Disabled
#1 : 1
AMO interrupt Enabled, An interrupt is generated when the AMO bit is set
End of enumeration elements list.
DMAEN : DMA Function Enable
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA function Disabled
#1 : 1
DMA function Enabled
End of enumeration elements list.
EXTTRIG : Regular group trig source select
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Internal trigger source(software trig)
#1 : 1
external trigger source
End of enumeration elements list.
IEXTTRIG : Inject group trig source select
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Internal trigger source(software trig)
#1 : 1
external trigger source
End of enumeration elements list.
ALIGN : Data Alignment
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
Right Alignment
#1 : 1
Left Alignment
End of enumeration elements list.
ISWSTART : software trigger for Inject channels
bits : 30 - 30 (1 bit)
access : read-write
SWSTART : software trigger for regular channels
bits : 31 - 31 (1 bit)
access : read-write
ADC Injection Group Offset Register(n)
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOFR : Injection group offset Value
bits : 0 - 11 (12 bit)
access : read-write
ADC Regular Group data Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDR : Regular group data Value
bits : 0 - 11 (12 bit)
access : read-only
ADC Injection Group Offset Register(n)
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOFR : Injection group offset Value
bits : 0 - 11 (12 bit)
access : read-write
ADC Injection Group data Register(n)
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDR : Injection group data Value
bits : 0 - 11 (12 bit)
access : read-only
ADC Injection Group Offset Register(n)
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOFR : Injection group offset Value
bits : 0 - 11 (12 bit)
access : read-write
ADC Control Register 2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADON : ADC converter ON/OFF register
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable ADC conversion and go to power down mode
#1 : 1
Enable ADC and to start conversion
End of enumeration elements list.
PSC : Bus Clock prescaler
bits : 12 - 15 (4 bit)
access : Read-write
ADC Injection Group data Register(n)
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDR : Injection group data Value
bits : 0 - 11 (12 bit)
access : read-only
ADC Sample time setting register 1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPT10 : Sample time for Channel 10
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT11 : Sample time for Channel 11
bits : 3 - 5 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT12 : Sample time for Channel 12
bits : 6 - 8 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT13 : Sample time for Channel 13
bits : 9 - 11 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT14 : Sample time for Channel 14
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT15 : Sample time for Channel 15
bits : 15 - 17 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT16 : Sample time for Channel 16
bits : 18 - 20 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
SPT17 : Sample time for Channel 17
bits : 21 - 23 (3 bit)
access : read-write
Enumeration:
#000 : 000
6 ADCCLK
#001 : 001
14 ADCCLK
#010 : 010
29 ADCCLK
#011 : 011
42 ADCCLK
#100 : 100
56 ADCCLK
#101 : 101
72 ADCCLK
#110 : 110
215 ADCCLK
#111 : 111
3 ADCCLK
End of enumeration elements list.
ADC Injection Group data Register(n)
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDR : Injection group data Value
bits : 0 - 11 (12 bit)
access : read-only
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