Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x12 byte (0x0)
mem_usage : registers
protection : not protected
PWDT Initialize Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVF : PWDT Counter Overflow flag
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
PWDT counter no overflow.
#1 : 1
PWDT counter runs from 0xFFFF to 0x0000.
End of enumeration elements list.
RDYF : PWDT Pulse Width Valid Flag
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
PWDT pulse width register(s) is not up-to-date.
#1 : 1
PWDT pulse width register(s) has been updated.
End of enumeration elements list.
SR : PWDT Soft Reset Register
bits : 2 - 2 (1 bit)
access : write-only
Enumeration:
#0 : 0
No action taken.
#1 : 1
Writing 1 to this field will perform soft reset to PWDT.
End of enumeration elements list.
OVIE : PWDT Counter Overflow Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable PWDT to generate interrupt when PWDTOV is set.
#1 : 1
Enable PWDT to generate interrupt when PWDTOV is set.
End of enumeration elements list.
PRDYIE : PWDT Pulse Width Data Ready Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable PWDT to generate interrupt when PWDTRDY is set.
#1 : 1
Enable PWDT to generate interrupt when PWDTRDY is set.
End of enumeration elements list.
IE : PWDT Module Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disables the PWDT to generate interrupt.
#1 : 1
Enables the PWDT to generate interrupt.
End of enumeration elements list.
PWDTEN : PWDT Module Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
The PWDT is disabled.
#1 : 1
The PWDT is enabled.
End of enumeration elements list.
PSC : PWDT Clock Prescaler (CLKPRE) Setting
bits : 7 - 9 (3 bit)
access : read-write
Enumeration:
#000 : 000
Clock divided by 1.
#001 : 001
Clock divided by 2.
#010 : 010
Clock divided by 4.
#011 : 011
Clock divided by 8.
#100 : 100
Clock divided by 16.
#101 : 101
Clock divided by 32.
#110 : 110
Clock divided by 64.
#111 : 111
Clock divided by 128.
End of enumeration elements list.
EDGE : PWDT Input Edge Sensitivity
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
#00 : 00
The first falling-edge starts the pulse width measurement, and on all the subsequent falling edges, the pulse width is captured.
#01 : 01
The first rising edge starts the pulse width measurement, and on all the subsequent rising and falling edges, the pulse width is captured.
#10 : 10
The first falling edge starts the pulse width measurement, and on all the subsequent rising and falling edges, the pulse width is captured.
#11 : 11
The first-rising edge starts the pulse width measurement, and on all the subsequent rising edges, the pulse width is captured.
End of enumeration elements list.
PINSEL : PWDT Pulse Inputs Selection
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
#00 : 00
PWDTIN[0] is enabled.
#01 : 01
PWDTIN[1] is enabled.
#10 : 10
PWDTIN[2] enabled.
#11 : 11
PWDTIN[3] enabled.
End of enumeration elements list.
PCLKSEL : PWDT Clock Source Selection
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Bus clock is selected as the clock source of PWDT counter.
#1 : 1
Alternative clock is selected as the clock source of PWDT counter.
End of enumeration elements list.
PPWCV : Positive Pulse Width Count Value
bits : 16 - 31 (16 bit)
access : read-only
Negative Pulse Width Count Value
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
NPWCV : Negative Pulse Width. It is suggested to use half-word (16-bit) or word (32-bit) to read out this value.
bits : 0 - 15 (16 bit)
access : read-only
PWDTC : PWDT Counter. It is suggested to use half-word (16-bit) or word (32-bit) to read out this value.
bits : 16 - 31 (16 bit)
access : read-only
Pulse Width Detection Timer Initialize Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FILTVAL : PWDT filter Value
bits : 0 - 3 (4 bit)
access : read-write
FILTPSC : PWDT input filter function Enable Bit
bits : 4 - 7 (4 bit)
access : read-write
FILTEN : PWDT input filter function Enable Bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
PWDT input filter function is disable
#1 : 1
PWDT input filter function is enable
End of enumeration elements list.
HALLEN : Hall Sensor Signal Detect function Enable Bit
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Hall Sensor Signal Detect function Disable
#1 : 1
Hall Sensor Signal Detect function Enable
End of enumeration elements list.
TIMEN : PWDT Timer Function Enable Bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
PWDT Timer Function Disable
#1 : 1
PWDT Timer Function Enable .
End of enumeration elements list.
CMPEN : PWDT Compare Mode Enable Bit
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
enable the pwt_in0 ~ pwt_in2 derived from acmp0_pwt_a ~ acmp0_pwt_c external
#1 : 1
enable the pwt_in0 ~ pwt_in2 derived from acmp0_pwt_a ~ acmp0_pwt_c internally
End of enumeration elements list.
TIMCNTVAL : PWDT Timer Load Value
bits : 12 - 27 (16 bit)
access : read-write
HALLSTATUS : HALL Sensor C Status Value
bits : 28 - 30 (3 bit)
access : read-only
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