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RI

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x0 Bytes (0x0)
size : 0x58 byte (0x0)
mem_usage : registers
protection :

Registers

HYSCR1

HYSCR2

HYSCR3

HYSCR4

ICR

ASCR1

ASCR2


HYSCR1

RI hysteresis control register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HYSCR1 HYSCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA PB

PA : Port A hysteresis control on/off
bits : 0 - 15 (16 bit)

PB : Port B hysteresis control on/off
bits : 16 - 31 (16 bit)


HYSCR2

RI hysteresis control register 2
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HYSCR2 HYSCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PC PD

PC : Port C hysteresis control on/off
bits : 0 - 15 (16 bit)

PD : Port D hysteresis control on/off
bits : 16 - 31 (16 bit)


HYSCR3

RI hysteresis control register 3
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HYSCR3 HYSCR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PE PF

PE : Port E hysteresis control on/off
bits : 0 - 15 (16 bit)

PF : Port F hysteresis control on/off
bits : 16 - 31 (16 bit)


HYSCR4

Hysteresis control register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HYSCR4 HYSCR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PG

PG : Port G hysteresis control on/off
bits : 0 - 15 (16 bit)


ICR

RI input capture register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICR ICR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IC1IOS IC2IOS IC3IOS IC4IOS TIM IC1 IC2 IC3 IC4

IC1IOS : Input capture 1 select bits
bits : 0 - 3 (4 bit)

IC2IOS : Input capture 2 select bits
bits : 4 - 7 (4 bit)

IC3IOS : Input capture 3 select bits
bits : 8 - 11 (4 bit)

IC4IOS : Input capture 4 select bits
bits : 12 - 15 (4 bit)

TIM : Timer select bits
bits : 16 - 17 (2 bit)

IC1 : IC1
bits : 18 - 18 (1 bit)

IC2 : IC2
bits : 19 - 19 (1 bit)

IC3 : IC3
bits : 20 - 20 (1 bit)

IC4 : IC4
bits : 21 - 21 (1 bit)


ASCR1

RI analog switches control register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ASCR1 ASCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0GR1_1 CH1GR1_2 CH2GR1_3 CH3GR1_4 CH31GR11_5 COMP1_SW1 CH6GR2_1 CH7GR2_2 CH8GR3_1 CH9GR3_2 CH10GR8_1 CH11GR8_2 CH12GR8_3 CH13GR8_4 CH14GR9_1 CH15GR9_2 CH31GR7_1 CH18GR7_1 CH19GR7_2 CH20GR7_3 CH21GR7_4 CH22 CH23 CH24 CH25 VCOMP CH27GR11_1 CH28GR11_2 CH29GR11_3 CH30GR11_4 SCM

CH0GR1_1 : Analog switch control
bits : 0 - 0 (1 bit)

CH1GR1_2 : Analog switch control
bits : 1 - 1 (1 bit)

CH2GR1_3 : Analog switch control
bits : 2 - 2 (1 bit)

CH3GR1_4 : Analog switch control
bits : 3 - 3 (1 bit)

CH31GR11_5 : Analog switch control
bits : 4 - 4 (1 bit)

COMP1_SW1 : Comparator 1 analog switch
bits : 5 - 5 (1 bit)

CH6GR2_1 : Analog switch control
bits : 6 - 6 (1 bit)

CH7GR2_2 : Analog switch control
bits : 7 - 7 (1 bit)

CH8GR3_1 : Analog switch control
bits : 8 - 8 (1 bit)

CH9GR3_2 : Analog switch control
bits : 9 - 9 (1 bit)

CH10GR8_1 : Analog switch control
bits : 10 - 10 (1 bit)

CH11GR8_2 : Analog switch control
bits : 11 - 11 (1 bit)

CH12GR8_3 : Analog switch control
bits : 12 - 12 (1 bit)

CH13GR8_4 : Analog switch control
bits : 13 - 13 (1 bit)

CH14GR9_1 : Analog switch control
bits : 14 - 14 (1 bit)

CH15GR9_2 : Analog switch control
bits : 15 - 15 (1 bit)

CH31GR7_1 : Analog switch control
bits : 16 - 16 (1 bit)

CH18GR7_1 : Analog switch control
bits : 18 - 18 (1 bit)

CH19GR7_2 : Analog switch control
bits : 19 - 19 (1 bit)

CH20GR7_3 : Analog switch control
bits : 20 - 20 (1 bit)

CH21GR7_4 : Analog switch control
bits : 21 - 21 (1 bit)

CH22 : Analog I/O switch control of channel CH22
bits : 22 - 22 (1 bit)

CH23 : Analog I/O switch control of channel CH23
bits : 23 - 23 (1 bit)

CH24 : Analog I/O switch control of channel CH24
bits : 24 - 24 (1 bit)

CH25 : Analog I/O switch control of channel CH25
bits : 25 - 25 (1 bit)

VCOMP : ADC analog switch selection for internal node to comparator 1
bits : 26 - 26 (1 bit)

CH27GR11_1 : Analog switch control
bits : 27 - 27 (1 bit)

CH28GR11_2 : Analog switch control
bits : 28 - 28 (1 bit)

CH29GR11_3 : Analog switch control
bits : 29 - 29 (1 bit)

CH30GR11_4 : Analog switch control
bits : 30 - 30 (1 bit)

SCM : Switch control mode
bits : 31 - 31 (1 bit)


ASCR2

RI analog switches control register 2
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ASCR2 ASCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GR10_1 GR10_2 GR10_3 GR10_4 GR6_1 GR6_2 GR5_1 GR5_2 GR5_3 GR4_1 GR4_2 GR4_3 GR3_3 GR3_4 GR3_5 GR9_3 GR9_4 GR2_3 GR2_4 GR2_5 GR7_5 GR7_6 GR7_7 GR6_3 GR6_4 GR5_4

GR10_1 : GR10_1 analog switch control
bits : 0 - 0 (1 bit)

GR10_2 : GR10_2 analog switch control
bits : 1 - 1 (1 bit)

GR10_3 : GR10_3 analog switch control
bits : 2 - 2 (1 bit)

GR10_4 : GR10_4 analog switch control
bits : 3 - 3 (1 bit)

GR6_1 : GR6_1 analog switch control
bits : 4 - 4 (1 bit)

GR6_2 : GR6_2 analog switch control
bits : 5 - 5 (1 bit)

GR5_1 : GR5_1 analog switch control
bits : 6 - 6 (1 bit)

GR5_2 : GR5_2 analog switch control
bits : 7 - 7 (1 bit)

GR5_3 : GR5_3 analog switch control
bits : 8 - 8 (1 bit)

GR4_1 : GR4_1 analog switch control
bits : 9 - 9 (1 bit)

GR4_2 : GR4_2 analog switch control
bits : 10 - 10 (1 bit)

GR4_3 : GR4_3 analog switch control
bits : 11 - 11 (1 bit)

GR3_3 : GR3_3 analog switch control
bits : 16 - 16 (1 bit)

GR3_4 : GR3_4 analog switch control
bits : 17 - 17 (1 bit)

GR3_5 : GR3_5 analog switch control
bits : 18 - 18 (1 bit)

GR9_3 : GR9_3 analog switch control
bits : 19 - 19 (1 bit)

GR9_4 : GR9_4 analog switch control
bits : 20 - 20 (1 bit)

GR2_3 : GR2_3 analog switch control
bits : 21 - 21 (1 bit)

GR2_4 : GR2_4 analog switch control
bits : 22 - 22 (1 bit)

GR2_5 : GR2_5 analog switch control
bits : 23 - 23 (1 bit)

GR7_5 : GR7_5 analog switch control
bits : 24 - 24 (1 bit)

GR7_6 : GR7_6 analog switch control
bits : 25 - 25 (1 bit)

GR7_7 : GR7_7 analog switch control
bits : 26 - 26 (1 bit)

GR6_3 : GR6_3 analog switch control
bits : 27 - 27 (1 bit)

GR6_4 : GR6_4 analog switch control
bits : 28 - 28 (1 bit)

GR5_4 : GR5_4 analog switch control
bits : 29 - 29 (1 bit)



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