\n

OPAMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

OPAMP1_CSR

OPAMP2_CSR

OPAMP2_OTR

OPAMP2_LPOTR

OPAMP1_OTR

OPAMP1_LPOTR


OPAMP1_CSR

OPAMP1 control/status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_CSR OPAMP1_CSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAEN OPALPM OPAMODE PGA_GAIN VM_SEL VP_SEL CALON CALSEL USERTRIM CALOUT OPA_RANGE

OPAEN : Operational amplifier Enable
bits : 0 - 0 (1 bit)

OPALPM : Operational amplifier Low Power Mode
bits : 1 - 1 (1 bit)

OPAMODE : Operational amplifier PGA mode
bits : 2 - 3 (2 bit)

PGA_GAIN : Operational amplifier Programmable amplifier gain value
bits : 4 - 5 (2 bit)

VM_SEL : Inverting input selection
bits : 8 - 9 (2 bit)

VP_SEL : Non inverted input selection
bits : 10 - 10 (1 bit)

CALON : Calibration mode enabled
bits : 12 - 12 (1 bit)

CALSEL : Calibration selection
bits : 13 - 13 (1 bit)

USERTRIM : allows to switch from AOP offset trimmed values to AOP offset
bits : 14 - 14 (1 bit)

CALOUT : Operational amplifier calibration output
bits : 15 - 15 (1 bit)

OPA_RANGE : Operational amplifier power supply range for stability
bits : 31 - 31 (1 bit)


OPAMP2_CSR

OPAMP2 control/status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_CSR OPAMP2_CSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAEN OPALPM OPAMODE PGA_GAIN VM_SEL VP_SEL CALON CALSEL USERTRIM CALOUT

OPAEN : Operational amplifier Enable
bits : 0 - 0 (1 bit)

OPALPM : Operational amplifier Low Power Mode
bits : 1 - 1 (1 bit)

OPAMODE : Operational amplifier PGA mode
bits : 2 - 3 (2 bit)

PGA_GAIN : Operational amplifier Programmable amplifier gain value
bits : 4 - 5 (2 bit)

VM_SEL : Inverting input selection
bits : 8 - 9 (2 bit)

VP_SEL : Non inverted input selection
bits : 10 - 10 (1 bit)

CALON : Calibration mode enabled
bits : 12 - 12 (1 bit)

CALSEL : Calibration selection
bits : 13 - 13 (1 bit)

USERTRIM : allows to switch from AOP offset trimmed values to AOP offset
bits : 14 - 14 (1 bit)

CALOUT : Operational amplifier calibration output
bits : 15 - 15 (1 bit)


OPAMP2_OTR

OPAMP2 offset trimming register in normal mode
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_OTR OPAMP2_OTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMOFFSETN TRIMOFFSETP

TRIMOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)


OPAMP2_LPOTR

OPAMP2 offset trimming register in low-power mode
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_LPOTR OPAMP2_LPOTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMLPOFFSETN TRIMLPOFFSETP

TRIMLPOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMLPOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)


OPAMP1_OTR

OPAMP1 offset trimming register in normal mode
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_OTR OPAMP1_OTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMOFFSETN TRIMOFFSETP

TRIMOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)


OPAMP1_LPOTR

OPAMP1 offset trimming register in low-power mode
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_LPOTR OPAMP1_LPOTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMLPOFFSETN TRIMLPOFFSETP

TRIMLPOFFSETN : Trim for NMOS differential pairs
bits : 0 - 4 (5 bit)

TRIMLPOFFSETP : Trim for PMOS differential pairs
bits : 8 - 12 (5 bit)



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.