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CKCU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CKCU_GCFGR (GCFGR)

CKCU_PLLCFGR (PLLCFGR)

CKCU_PLLCR (PLLCR)

CKCU_AHBCFGR (AHBCFGR)

CKCU_AHBCCR (AHBCCR)

CKCU_APBCFGR (APBCFGR)

CKCU_APBCCR0 (APBCCR0)

CKCU_APBCCR1 (APBCCR1)

CKCU_LPCR (LPCR)

CKCU_MCUDBGCR (MCUDBGCR)

CKCU_CKST (CKST)

CKCU_APBPCSR0 (APBPCSR0)

CKCU_APBPCSR1 (APBPCSR1)

CKCU_GCCR (GCCR)

CKCU_HSICR (HSICR)

HSIATCR

CKCU_GCSR (GCSR)

CKCU_GCIR (GCIR)


CKCU_GCFGR (GCFGR)

CKCU_GCFGR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_GCFGR CKCU_GCFGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CKOUTSRC PLLSRC CKREFPRE USBPRE LPMOD

CKOUTSRC : CKOUTSRC
bits : 0 - 2 (3 bit)
access : read-write

PLLSRC : PLLSRC
bits : 8 - 16 (9 bit)
access : read-write

CKREFPRE : CKREFPRE
bits : 11 - 26 (16 bit)
access : read-write

USBPRE : USBPRE
bits : 22 - 45 (24 bit)
access : read-write

LPMOD : LPMOD
bits : 29 - 60 (32 bit)
access : read-write


CKCU_PLLCFGR (PLLCFGR)

CKCU_PLLCFGR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_PLLCFGR CKCU_PLLCFGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 POTD PFBD

POTD : POTD
bits : 21 - 43 (23 bit)
access : read-write

PFBD : PFBD
bits : 23 - 51 (29 bit)
access : read-write


CKCU_PLLCR (PLLCR)

CKCU_PLLCR
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_PLLCR CKCU_PLLCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PLLBPS

PLLBPS : PLLBPS
bits : 31 - 62 (32 bit)
access : read-write


CKCU_AHBCFGR (AHBCFGR)

CKCU_AHBCFGR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_AHBCFGR CKCU_AHBCFGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AHBPRE

AHBPRE : AHBPRE
bits : 0 - 1 (2 bit)
access : read-write


CKCU_AHBCCR (AHBCCR)

CKCU_AHBCCR
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_AHBCCR CKCU_AHBCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FMCEN SRAMEN PDMAEN BMEN APB0EN APB1EN USBEN CKREFEN EBIEN CRCEN PAEN PBEN PCEN PDEN

FMCEN : FMCEN
bits : 0 - 0 (1 bit)
access : read-write

SRAMEN : SRAMEN
bits : 2 - 4 (3 bit)
access : read-write

PDMAEN : PDMAEN
bits : 4 - 8 (5 bit)
access : read-write

BMEN : BMEN
bits : 5 - 10 (6 bit)
access : read-write

APB0EN : APB0EN
bits : 6 - 12 (7 bit)
access : read-write

APB1EN : APB1EN
bits : 7 - 14 (8 bit)
access : read-write

USBEN : USBEN
bits : 10 - 20 (11 bit)
access : read-write

CKREFEN : CKREFEN
bits : 11 - 22 (12 bit)
access : read-write

EBIEN : EBIEN
bits : 12 - 24 (13 bit)
access : read-write

CRCEN : CRCEN
bits : 13 - 26 (14 bit)
access : read-write

PAEN : PAEN
bits : 16 - 32 (17 bit)
access : read-write

PBEN : PBEN
bits : 17 - 34 (18 bit)
access : read-write

PCEN : PCEN
bits : 18 - 36 (19 bit)
access : read-write

PDEN : PDEN
bits : 19 - 38 (20 bit)
access : read-write


CKCU_APBCFGR (APBCFGR)

CKCU_APBCFGR
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_APBCFGR CKCU_APBCFGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADCDIV

ADCDIV : ADCDIV
bits : 16 - 34 (19 bit)
access : read-write


CKCU_APBCCR0 (APBCCR0)

CKCU_APBCCR0
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_APBCCR0 CKCU_APBCCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 I2C0EN I2C1EN SPI0EN SPI1EN USR0EN USR1EN UR0EN UR1EN AFIOEN EXTIEN SCIEN I2SEN

I2C0EN : I2C0EN
bits : 0 - 0 (1 bit)
access : read-write

I2C1EN : I2C1EN
bits : 1 - 2 (2 bit)
access : read-write

SPI0EN : SPI0EN
bits : 4 - 8 (5 bit)
access : read-write

SPI1EN : SPI1EN
bits : 5 - 10 (6 bit)
access : read-write

USR0EN : USR0EN
bits : 8 - 16 (9 bit)
access : read-write

USR1EN : USR1EN
bits : 9 - 18 (10 bit)
access : read-write

UR0EN : UR0EN
bits : 10 - 20 (11 bit)
access : read-write

UR1EN : UR1EN
bits : 11 - 22 (12 bit)
access : read-write

AFIOEN : AFIOEN
bits : 14 - 28 (15 bit)
access : read-write

EXTIEN : EXTIEN
bits : 15 - 30 (16 bit)
access : read-write

SCIEN : SCIEN
bits : 24 - 48 (25 bit)
access : read-write

I2SEN : I2SEN
bits : 25 - 50 (26 bit)
access : read-write


CKCU_APBCCR1 (APBCCR1)

CKCU_APBCCR1
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_APBCCR1 CKCU_APBCCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MCTM0EN MCTM1EN WDTEN RTCEN GPTM0EN GPTM1EN BFTM0EN BFTM1EN CMPEN ADCEN

MCTM0EN : MCTM0EN
bits : 0 - 0 (1 bit)
access : read-write

MCTM1EN : MCTM1EN
bits : 1 - 2 (2 bit)
access : read-write

WDTEN : WDTEN
bits : 4 - 8 (5 bit)
access : read-write

RTCEN : RTCEN
bits : 6 - 12 (7 bit)
access : read-write

GPTM0EN : GPTM0EN
bits : 8 - 16 (9 bit)
access : read-write

GPTM1EN : GPTM1EN
bits : 9 - 18 (10 bit)
access : read-write

BFTM0EN : BFTM0EN
bits : 16 - 32 (17 bit)
access : read-write

BFTM1EN : BFTM1EN
bits : 17 - 34 (18 bit)
access : read-write

CMPEN : CMPEN
bits : 22 - 44 (23 bit)
access : read-write

ADCEN : ADCEN
bits : 24 - 48 (25 bit)
access : read-write


CKCU_LPCR (LPCR)

CKCU_LPCR
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_LPCR CKCU_LPCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKISO USBSLEEP

BKISO : BKISO
bits : 0 - 0 (1 bit)
access : read-write

USBSLEEP : USBSLEEP
bits : 8 - 16 (9 bit)
access : read-write


CKCU_MCUDBGCR (MCUDBGCR)

CKCU_MCUDBGCR
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_MCUDBGCR CKCU_MCUDBGCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBSLP DBDSLP1 DBPD DBWDT DBMCTM0 DBMCTM1 DBGPTM0 DBGPTM1 DBUSR0 DBUSR1 DBSPI0 DBSPI1 DBI2C0 DBI2C1 DBDSLP2 DBSCI DBBFTM0 DBBFTM1 DBUR0 DBUR1 DBTRACE

DBSLP : DBSLP
bits : 0 - 0 (1 bit)
access : read-write

DBDSLP1 : DBDSLP1
bits : 1 - 2 (2 bit)
access : read-write

DBPD : DBPD
bits : 2 - 4 (3 bit)
access : read-write

DBWDT : DBWDT
bits : 3 - 6 (4 bit)
access : read-write

DBMCTM0 : DBMCTM0
bits : 4 - 8 (5 bit)
access : read-write

DBMCTM1 : DBMCTM1
bits : 5 - 10 (6 bit)
access : read-write

DBGPTM0 : DBGPTM0
bits : 6 - 12 (7 bit)
access : read-write

DBGPTM1 : DBGPTM1
bits : 7 - 14 (8 bit)
access : read-write

DBUSR0 : DBUSR0
bits : 8 - 16 (9 bit)
access : read-write

DBUSR1 : DBUSR1
bits : 9 - 18 (10 bit)
access : read-write

DBSPI0 : DBSPI0
bits : 10 - 20 (11 bit)
access : read-write

DBSPI1 : DBSPI1
bits : 11 - 22 (12 bit)
access : read-write

DBI2C0 : DBI2C0
bits : 12 - 24 (13 bit)
access : read-write

DBI2C1 : DBI2C1
bits : 13 - 26 (14 bit)
access : read-write

DBDSLP2 : DBDSLP2
bits : 14 - 28 (15 bit)
access : read-write

DBSCI : DBSCI
bits : 15 - 30 (16 bit)
access : read-write

DBBFTM0 : DBBFTM0
bits : 16 - 32 (17 bit)
access : read-write

DBBFTM1 : DBBFTM1
bits : 17 - 34 (18 bit)
access : read-write

DBUR0 : DBUR0
bits : 18 - 36 (19 bit)
access : read-write

DBUR1 : DBUR1
bits : 19 - 38 (20 bit)
access : read-write

DBTRACE : DBTRACE
bits : 20 - 40 (21 bit)
access : read-write


CKCU_CKST (CKST)

CKCU_CKST
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_CKST CKCU_CKST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PLLST HSEST HSIST CKSWST

PLLST : PLLST
bits : 8 - 19 (12 bit)
access : read-write

HSEST : HSEST
bits : 16 - 33 (18 bit)
access : read-write

HSIST : HSIST
bits : 24 - 50 (27 bit)
access : read-write

CKSWST : CKSWST
bits : 30 - 61 (32 bit)
access : read-write


CKCU_APBPCSR0 (APBPCSR0)

CKCU_APBPCSR0
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_APBPCSR0 CKCU_APBPCSR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 I2C0PCLK I2C1PCLK SPI0PCLK SPI1PCLK BFTM0PCLK BFTM1PCLK MCTM0PCLK MCTM1PCLK GPTM0PCLK GPTM1PCLK USR0PCLK USR1PCLK UR0PCLK UR1PCLK

I2C0PCLK : I2C0PCLK
bits : 0 - 1 (2 bit)
access : read-write

I2C1PCLK : I2C1PCLK
bits : 2 - 5 (4 bit)
access : read-write

SPI0PCLK : SPI0PCLK
bits : 4 - 9 (6 bit)
access : read-write

SPI1PCLK : SPI1PCLK
bits : 6 - 13 (8 bit)
access : read-write

BFTM0PCLK : BFTM0PCLK
bits : 12 - 25 (14 bit)
access : read-write

BFTM1PCLK : BFTM1PCLK
bits : 14 - 29 (16 bit)
access : read-write

MCTM0PCLK : MCTM0PCLK
bits : 16 - 33 (18 bit)
access : read-write

MCTM1PCLK : MCTM1PCLK
bits : 18 - 37 (20 bit)
access : read-write

GPTM0PCLK : GPTM0PCLK
bits : 20 - 41 (22 bit)
access : read-write

GPTM1PCLK : GPTM1PCLK
bits : 22 - 45 (24 bit)
access : read-write

USR0PCLK : USR0PCLK
bits : 24 - 49 (26 bit)
access : read-write

USR1PCLK : USR1PCLK
bits : 26 - 53 (28 bit)
access : read-write

UR0PCLK : UR0PCLK
bits : 28 - 57 (30 bit)
access : read-write

UR1PCLK : UR1PCLK
bits : 30 - 61 (32 bit)
access : read-write


CKCU_APBPCSR1 (APBPCSR1)

CKCU_APBPCSR1
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_APBPCSR1 CKCU_APBPCSR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFIOPCLK EXTIPCLK ADCCPCLK CMPPCLK WDTRPCLK BKPRPCLK SCIPCLK I2SPCLK

AFIOPCLK : AFIOPCLK
bits : 0 - 1 (2 bit)
access : read-write

EXTIPCLK : EXTIPCLK
bits : 2 - 5 (4 bit)
access : read-write

ADCCPCLK : ADCCPCLK
bits : 4 - 9 (6 bit)
access : read-write

CMPPCLK : CMPPCLK
bits : 8 - 17 (10 bit)
access : read-write

WDTRPCLK : WDTRPCLK
bits : 12 - 25 (14 bit)
access : read-write

BKPRPCLK : BKPRPCLK
bits : 14 - 29 (16 bit)
access : read-write

SCIPCLK : SCIPCLK
bits : 16 - 33 (18 bit)
access : read-write

I2SPCLK : I2SPCLK
bits : 20 - 41 (22 bit)
access : read-write


CKCU_GCCR (GCCR)

CKCU_GCCR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_GCCR CKCU_GCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SW PLLEN HSEEN HSIEN CKMEN PSRCEN

SW : SW
bits : 0 - 1 (2 bit)
access : read-write

PLLEN : PLLEN
bits : 9 - 18 (10 bit)
access : read-write

HSEEN : HSEEN
bits : 10 - 20 (11 bit)
access : read-write

HSIEN : HSIEN
bits : 11 - 22 (12 bit)
access : read-write

CKMEN : CKMEN
bits : 16 - 32 (17 bit)
access : read-write

PSRCEN : PSRCEN
bits : 17 - 34 (18 bit)
access : read-write


CKCU_HSICR (HSICR)

CKCU_HSICR
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_HSICR CKCU_HSICR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMEN ATCEN TMSEL REFCLKSEL FLOCK HSIFINE HSICOARSE

TRIMEN : TRIMEN
bits : 0 - 0 (1 bit)
access : read-write

ATCEN : ATCEN
bits : 1 - 2 (2 bit)
access : read-write

TMSEL : TMSEL
bits : 4 - 8 (5 bit)
access : read-write

REFCLKSEL : REFCLKSEL
bits : 5 - 11 (7 bit)
access : read-write

FLOCK : FLOCK
bits : 7 - 14 (8 bit)
access : read-write

HSIFINE : HSIFINE
bits : 16 - 39 (24 bit)
access : read-write

HSICOARSE : HSICOARSE
bits : 24 - 52 (29 bit)
access : read-write


HSIATCR

HSIATCR
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HSIATCR HSIATCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ATCNT

ATCNT : ATCNT
bits : 0 - 13 (14 bit)
access : read-write


CKCU_GCSR (GCSR)

CKCU_GCSR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_GCSR CKCU_GCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PLLRDY HSERDY HSIRDY LSERDY LSIRDY

PLLRDY : PLLRDY
bits : 1 - 2 (2 bit)
access : read-write

HSERDY : HSERDY
bits : 2 - 4 (3 bit)
access : read-write

HSIRDY : HSIRDY
bits : 3 - 6 (4 bit)
access : read-write

LSERDY : LSERDY
bits : 4 - 8 (5 bit)
access : read-write

LSIRDY : LSIRDY
bits : 5 - 10 (6 bit)
access : read-write


CKCU_GCIR (GCIR)

CKCU_GCIR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCU_GCIR CKCU_GCIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CKSF PLLRDYF HSERDYF HSIRDYF LSERDYF LSIRDYF CKSIE PLLRDYIE HSERDYIE HSIRDYIE LSERDYIE LSIRDYIE

CKSF : CKSF
bits : 0 - 0 (1 bit)
access : read-write

PLLRDYF : PLLRDYF
bits : 2 - 4 (3 bit)
access : read-write

HSERDYF : HSERDYF
bits : 3 - 6 (4 bit)
access : read-write

HSIRDYF : HSIRDYF
bits : 4 - 8 (5 bit)
access : read-write

LSERDYF : LSERDYF
bits : 5 - 10 (6 bit)
access : read-write

LSIRDYF : LSIRDYF
bits : 6 - 12 (7 bit)
access : read-write

CKSIE : CKSIE
bits : 16 - 32 (17 bit)
access : read-write

PLLRDYIE : PLLRDYIE
bits : 18 - 36 (19 bit)
access : read-write

HSERDYIE : HSERDYIE
bits : 19 - 38 (20 bit)
access : read-write

HSIRDYIE : HSIRDYIE
bits : 20 - 40 (21 bit)
access : read-write

LSERDYIE : LSERDYIE
bits : 21 - 42 (22 bit)
access : read-write

LSIRDYIE : LSIRDYIE
bits : 22 - 44 (23 bit)
access : read-write



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