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RTC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

RTC_CNT (CNT)

RTC_IWEN (IWEN)

RTC_CMP (CMP)

RTC_CR (CR)

RTC_SR (SR)


RTC_CNT (CNT)

RTC_CNT
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTC_CNT RTC_CNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTCCNT

RTCCNT : RTCCNT
bits : 0 - 31 (32 bit)
access : read-write


RTC_IWEN (IWEN)

RTC_IWEN
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTC_IWEN RTC_IWEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSECIEN CMIEN OVIEN CSECWEN CMWEN OVWEN

CSECIEN : CSECIEN
bits : 0 - 0 (1 bit)
access : read-write

CMIEN : CMIEN
bits : 1 - 2 (2 bit)
access : read-write

OVIEN : OVIEN
bits : 2 - 4 (3 bit)
access : read-write

CSECWEN : CSECWEN
bits : 8 - 16 (9 bit)
access : read-write

CMWEN : CMWEN
bits : 9 - 18 (10 bit)
access : read-write

OVWEN : OVWEN
bits : 10 - 20 (11 bit)
access : read-write


RTC_CMP (CMP)

RTC_CMP
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTC_CMP RTC_CMP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTCCMP

RTCCMP : RTCCMP
bits : 0 - 31 (32 bit)
access : read-write


RTC_CR (CR)

RTC_CR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTC_CR RTC_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTCEN RTCSRC LSIEN LSEEN CMPCLR LSESM RPRE ROEN ROES ROWM ROAP ROLF

RTCEN : RTCEN
bits : 0 - 0 (1 bit)
access : read-write

RTCSRC : RTCSRC
bits : 1 - 2 (2 bit)
access : read-write

LSIEN : LSIEN
bits : 2 - 4 (3 bit)
access : read-write

LSEEN : LSEEN
bits : 3 - 6 (4 bit)
access : read-write

CMPCLR : CMPCLR
bits : 4 - 8 (5 bit)
access : read-write

LSESM : LSESM
bits : 5 - 10 (6 bit)
access : read-write

RPRE : RPRE
bits : 8 - 19 (12 bit)
access : read-write

ROEN : ROEN
bits : 16 - 32 (17 bit)
access : read-write

ROES : ROES
bits : 17 - 34 (18 bit)
access : read-write

ROWM : ROWM
bits : 18 - 36 (19 bit)
access : read-write

ROAP : ROAP
bits : 19 - 38 (20 bit)
access : read-write

ROLF : ROLF
bits : 20 - 40 (21 bit)
access : read-write


RTC_SR (SR)

RTC_SR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTC_SR RTC_SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSECFLAG CMFLAG OVFLAG

CSECFLAG : CSECFLAG
bits : 0 - 0 (1 bit)
access : read-write

CMFLAG : CMFLAG
bits : 1 - 2 (2 bit)
access : read-write

OVFLAG : OVFLAG
bits : 2 - 4 (3 bit)
access : read-write



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