\n

OCTOSPIM

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

P1CR

P2CR


P1CR

OctoSPI IO Manager Port 1 Configuration Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P1CR P1CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKEN CLKSRC DQSEN DQSSRC NCSEN NCSSRC IOLEN IOLSRC IOHEN IOHSRC

CLKEN : CLK/CLK Enable for Port
bits : 0 - 0 (1 bit)

CLKSRC : CLK/CLK Source for Port
bits : 1 - 1 (1 bit)

DQSEN : DQS Enable for Port
bits : 4 - 4 (1 bit)

DQSSRC : DQS Source for Port
bits : 5 - 5 (1 bit)

NCSEN : CS Enable for Port
bits : 8 - 8 (1 bit)

NCSSRC : CS Source for Port
bits : 9 - 9 (1 bit)

IOLEN : Enable for Port
bits : 16 - 16 (1 bit)

IOLSRC : Source for Port
bits : 17 - 18 (2 bit)

IOHEN : Enable for Port n
bits : 24 - 24 (1 bit)

IOHSRC : Source for Port
bits : 25 - 26 (2 bit)


P2CR

OctoSPI IO Manager Port 2 Configuration Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

P2CR P2CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKEN CLKSRC DQSEN DQSSRC NCSEN NCSSRC IOLEN IOLSRC IOHEN IOHSRC

CLKEN : CLK/CLK Enable for Port
bits : 0 - 0 (1 bit)

CLKSRC : CLK/CLK Source for Port
bits : 1 - 1 (1 bit)

DQSEN : DQS Enable for Port
bits : 4 - 4 (1 bit)

DQSSRC : DQS Source for Port
bits : 5 - 5 (1 bit)

NCSEN : CS Enable for Port
bits : 8 - 8 (1 bit)

NCSSRC : CS Source for Port
bits : 9 - 9 (1 bit)

IOLEN : Enable for Port
bits : 16 - 16 (1 bit)

IOLSRC : Source for Port
bits : 17 - 18 (2 bit)

IOHEN : Enable for Port n
bits : 24 - 24 (1 bit)

IOHSRC : Source for Port
bits : 25 - 26 (2 bit)



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