\n

SCB

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

SCR

CCR


SCR

SCR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCR SCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEEPONEXIT SLEEPDEEP SEVONPEND

SLEEPONEXIT : SLEEPONEXIT
bits : 1 - 2 (2 bit)
access : read-write

SLEEPDEEP : SLEEPDEEP
bits : 2 - 4 (3 bit)
access : read-write

SEVONPEND : SEVONPEND
bits : 4 - 8 (5 bit)
access : read-write


CCR

CCR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCR CCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NONEBASETHRDENA USERSETMPEND UNALIGN_TRP DIV_0_TRP BFHFNMIGN STKALIGN

NONEBASETHRDENA : NONEBASETHRDENA
bits : 0 - 0 (1 bit)
access : read-write

USERSETMPEND : USERSETMPEND
bits : 1 - 2 (2 bit)
access : read-write

UNALIGN_TRP : UNALIGN_TRP
bits : 3 - 6 (4 bit)
access : read-write

DIV_0_TRP : DIV_0_TRP
bits : 4 - 8 (5 bit)
access : read-write

BFHFNMIGN : BFHFNMIGN
bits : 8 - 16 (9 bit)
access : read-write

STKALIGN : STKALIGN
bits : 9 - 18 (10 bit)
access : read-write



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