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EXTI

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

EXTI_CFGR0 (CFGR0)

EXTI_CFGR4 (CFGR4)

EXTI_CFGR5 (CFGR5)

EXTI_CFGR6 (CFGR6)

EXTI_CFGR7 (CFGR7)

EXTI_CFGR8 (CFGR8)

EXTI_CFGR9 (CFGR9)

EXTI_CFGR10 (CFGR10)

EXTI_CFGR11 (CFGR11)

EXTI_CFGR12 (CFGR12)

EXTI_CFGR13 (CFGR13)

EXTI_CFGR14 (CFGR14)

EXTI_CFGR15 (CFGR15)

EXTI_CFGR1 (CFGR1)

EXTI_CR (CR)

EXTI_EDGEFLGR (EDGEFLGR)

EXTI_EDGESR (EDGESR)

EXTI_SSCR (SSCR)

EXTI_WAKUPCR (WAKUPCR)

EXTI_WAKUPPOLR (WAKUPPOLR)

EXTI_WAKUPFLG (WAKUPFLG)

EXTI_CFGR2 (CFGR2)

EXTI_CFGR3 (CFGR3)


EXTI_CFGR0 (CFGR0)

EXTI_CFGR0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR0 EXTI_CFGR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR4 (CFGR4)

EXTI_CFGR4
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR4 EXTI_CFGR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR5 (CFGR5)

EXTI_CFGR5
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR5 EXTI_CFGR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR6 (CFGR6)

EXTI_CFGR6
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR6 EXTI_CFGR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR7 (CFGR7)

EXTI_CFGR7
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR7 EXTI_CFGR7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR8 (CFGR8)

EXTI_CFGR8
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR8 EXTI_CFGR8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR9 (CFGR9)

EXTI_CFGR9
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR9 EXTI_CFGR9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR10 (CFGR10)

EXTI_CFGR10
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR10 EXTI_CFGR10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR11 (CFGR11)

EXTI_CFGR11
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR11 EXTI_CFGR11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR12 (CFGR12)

EXTI_CFGR12
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR12 EXTI_CFGR12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR13 (CFGR13)

EXTI_CFGR13
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR13 EXTI_CFGR13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR14 (CFGR14)

EXTI_CFGR14
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR14 EXTI_CFGR14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR15 (CFGR15)

EXTI_CFGR15
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR15 EXTI_CFGR15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR1 (CFGR1)

EXTI_CFGR1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR1 EXTI_CFGR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CR (CR)

EXTI_CR
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CR EXTI_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0EN EXTI1EN EXTI2EN EXTI3EN EXTI4EN EXTI5EN EXTI6EN EXTI7EN EXTI8EN EXTI9EN EXTI10EN EXTI11EN EXTI12EN EXTI13EN EXTI14EN EXTI15EN

EXTI0EN : EXTI0EN
bits : 0 - 0 (1 bit)
access : read-write

EXTI1EN : EXTI1EN
bits : 1 - 2 (2 bit)
access : read-write

EXTI2EN : EXTI2EN
bits : 2 - 4 (3 bit)
access : read-write

EXTI3EN : EXTI3EN
bits : 3 - 6 (4 bit)
access : read-write

EXTI4EN : EXTI4EN
bits : 4 - 8 (5 bit)
access : read-write

EXTI5EN : EXTI5EN
bits : 5 - 10 (6 bit)
access : read-write

EXTI6EN : EXTI6EN
bits : 6 - 12 (7 bit)
access : read-write

EXTI7EN : EXTI7EN
bits : 7 - 14 (8 bit)
access : read-write

EXTI8EN : EXTI8EN
bits : 8 - 16 (9 bit)
access : read-write

EXTI9EN : EXTI9EN
bits : 9 - 18 (10 bit)
access : read-write

EXTI10EN : EXTI10EN
bits : 10 - 20 (11 bit)
access : read-write

EXTI11EN : EXTI11EN
bits : 11 - 22 (12 bit)
access : read-write

EXTI12EN : EXTI12EN
bits : 12 - 24 (13 bit)
access : read-write

EXTI13EN : EXTI13EN
bits : 13 - 26 (14 bit)
access : read-write

EXTI14EN : EXTI14EN
bits : 14 - 28 (15 bit)
access : read-write

EXTI15EN : EXTI15EN
bits : 15 - 30 (16 bit)
access : read-write


EXTI_EDGEFLGR (EDGEFLGR)

EXTI_EDGEFLGR
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_EDGEFLGR EXTI_EDGEFLGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0EDF EXTI1EDF EXTI2EDF EXTI3EDF EXTI4EDF EXTI5EDF EXTI6EDF EXTI7EDF EXTI8EDF EXTI9EDF EXTI10EDF EXTI11EDF EXTI12EDF EXTI13EDF EXTI14EDF EXTI15EDF

EXTI0EDF : EXTI0EDF
bits : 0 - 0 (1 bit)
access : read-write

EXTI1EDF : EXTI1EDF
bits : 1 - 2 (2 bit)
access : read-write

EXTI2EDF : EXTI2EDF
bits : 2 - 4 (3 bit)
access : read-write

EXTI3EDF : EXTI3EDF
bits : 3 - 6 (4 bit)
access : read-write

EXTI4EDF : EXTI4EDF
bits : 4 - 8 (5 bit)
access : read-write

EXTI5EDF : EXTI5EDF
bits : 5 - 10 (6 bit)
access : read-write

EXTI6EDF : EXTI6EDF
bits : 6 - 12 (7 bit)
access : read-write

EXTI7EDF : EXTI7EDF
bits : 7 - 14 (8 bit)
access : read-write

EXTI8EDF : EXTI8EDF
bits : 8 - 16 (9 bit)
access : read-write

EXTI9EDF : EXTI9EDF
bits : 9 - 18 (10 bit)
access : read-write

EXTI10EDF : EXTI10EDF
bits : 10 - 20 (11 bit)
access : read-write

EXTI11EDF : EXTI11EDF
bits : 11 - 22 (12 bit)
access : read-write

EXTI12EDF : EXTI12EDF
bits : 12 - 24 (13 bit)
access : read-write

EXTI13EDF : EXTI13EDF
bits : 13 - 26 (14 bit)
access : read-write

EXTI14EDF : EXTI14EDF
bits : 14 - 28 (15 bit)
access : read-write

EXTI15EDF : EXTI15EDF
bits : 15 - 30 (16 bit)
access : read-write


EXTI_EDGESR (EDGESR)

EXTI_EDGESR
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_EDGESR EXTI_EDGESR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0EDS EXTI1EDS EXTI2EDS EXTI3EDS EXTI4EDS EXTI5EDS EXTI6EDS EXTI7EDS EXTI8EDS EXTI9EDS EXTI10EDS EXTI11EDS EXTI12EDS EXTI13EDS EXTI14EDS EXTI15EDS

EXTI0EDS : EXTI0EDS
bits : 0 - 0 (1 bit)
access : read-write

EXTI1EDS : EXTI1EDS
bits : 1 - 2 (2 bit)
access : read-write

EXTI2EDS : EXTI2EDS
bits : 2 - 4 (3 bit)
access : read-write

EXTI3EDS : EXTI3EDS
bits : 3 - 6 (4 bit)
access : read-write

EXTI4EDS : EXTI4EDS
bits : 4 - 8 (5 bit)
access : read-write

EXTI5EDS : EXTI5EDS
bits : 5 - 10 (6 bit)
access : read-write

EXTI6EDS : EXTI6EDS
bits : 6 - 12 (7 bit)
access : read-write

EXTI7EDS : EXTI7EDS
bits : 7 - 14 (8 bit)
access : read-write

EXTI8EDS : EXTI8EDS
bits : 8 - 16 (9 bit)
access : read-write

EXTI9EDS : EXTI9EDS
bits : 9 - 18 (10 bit)
access : read-write

EXTI10EDS : EXTI10EDS
bits : 10 - 20 (11 bit)
access : read-write

EXTI11EDS : EXTI11EDS
bits : 11 - 22 (12 bit)
access : read-write

EXTI12EDS : EXTI12EDS
bits : 12 - 24 (13 bit)
access : read-write

EXTI13EDS : EXTI13EDS
bits : 13 - 26 (14 bit)
access : read-write

EXTI14EDS : EXTI14EDS
bits : 14 - 28 (15 bit)
access : read-write

EXTI15EDS : EXTI15EDS
bits : 15 - 30 (16 bit)
access : read-write


EXTI_SSCR (SSCR)

EXTI_SSCR
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_SSCR EXTI_SSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0SC EXTI1SC EXTI2SC EXTI3SC EXTI4SC EXTI5SC EXTI6SC EXTI7SC EXTI8SC EXTI9SC EXTI10SC EXTI11SC EXTI12SC EXTI13SC EXTI14SC EXTI15SC

EXTI0SC : EXTI0SC
bits : 0 - 0 (1 bit)
access : read-write

EXTI1SC : EXTI1SC
bits : 1 - 2 (2 bit)
access : read-write

EXTI2SC : EXTI2SC
bits : 2 - 4 (3 bit)
access : read-write

EXTI3SC : EXTI3SC
bits : 3 - 6 (4 bit)
access : read-write

EXTI4SC : EXTI4SC
bits : 4 - 8 (5 bit)
access : read-write

EXTI5SC : EXTI5SC
bits : 5 - 10 (6 bit)
access : read-write

EXTI6SC : EXTI6SC
bits : 6 - 12 (7 bit)
access : read-write

EXTI7SC : EXTI7SC
bits : 7 - 14 (8 bit)
access : read-write

EXTI8SC : EXTI8SC
bits : 8 - 16 (9 bit)
access : read-write

EXTI9SC : EXTI9SC
bits : 9 - 18 (10 bit)
access : read-write

EXTI10SC : EXTI10SC
bits : 10 - 20 (11 bit)
access : read-write

EXTI11SC : EXTI11SC
bits : 11 - 22 (12 bit)
access : read-write

EXTI12SC : EXTI12SC
bits : 12 - 24 (13 bit)
access : read-write

EXTI13SC : EXTI13SC
bits : 13 - 26 (14 bit)
access : read-write

EXTI14SC : EXTI14SC
bits : 14 - 28 (15 bit)
access : read-write

EXTI15SC : EXTI15SC
bits : 15 - 30 (16 bit)
access : read-write


EXTI_WAKUPCR (WAKUPCR)

EXTI_WAKUPCR
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_WAKUPCR EXTI_WAKUPCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0WEN EXTI1WEN EXTI2WEN EXTI3WEN EXTI4WEN EXTI5WEN EXTI6WEN EXTI7WEN EXTI8WEN EXTI9WEN EXTI10WEN EXTI11WEN EXTI12WEN EXTI13WEN EXTI14WEN EXTI15WEN EVWUPIEN

EXTI0WEN : EXTI0WEN
bits : 0 - 0 (1 bit)
access : read-write

EXTI1WEN : EXTI1WEN
bits : 1 - 2 (2 bit)
access : read-write

EXTI2WEN : EXTI2WEN
bits : 2 - 4 (3 bit)
access : read-write

EXTI3WEN : EXTI3WEN
bits : 3 - 6 (4 bit)
access : read-write

EXTI4WEN : EXTI4WEN
bits : 4 - 8 (5 bit)
access : read-write

EXTI5WEN : EXTI5WEN
bits : 5 - 10 (6 bit)
access : read-write

EXTI6WEN : EXTI6WEN
bits : 6 - 12 (7 bit)
access : read-write

EXTI7WEN : EXTI7WEN
bits : 7 - 14 (8 bit)
access : read-write

EXTI8WEN : EXTI8WEN
bits : 8 - 16 (9 bit)
access : read-write

EXTI9WEN : EXTI9WEN
bits : 9 - 18 (10 bit)
access : read-write

EXTI10WEN : EXTI10WEN
bits : 10 - 20 (11 bit)
access : read-write

EXTI11WEN : EXTI11WEN
bits : 11 - 22 (12 bit)
access : read-write

EXTI12WEN : EXTI12WEN
bits : 12 - 24 (13 bit)
access : read-write

EXTI13WEN : EXTI13WEN
bits : 13 - 26 (14 bit)
access : read-write

EXTI14WEN : EXTI14WEN
bits : 14 - 28 (15 bit)
access : read-write

EXTI15WEN : EXTI15WEN
bits : 15 - 30 (16 bit)
access : read-write

EVWUPIEN : EVWUPIEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_WAKUPPOLR (WAKUPPOLR)

EXTI_WAKUPPOLR
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_WAKUPPOLR EXTI_WAKUPPOLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0POL EXTI1POL EXTI2POL EXTI3POL EXTI4POL EXTI5POL EXTI6POL EXTI7POL EXTI8POL EXTI9POL EXTI10POL EXTI11POL EXTI12POL EXTI13POL EXTI14POL EXTI15POL

EXTI0POL : EXTI0POL
bits : 0 - 0 (1 bit)
access : read-write

EXTI1POL : EXTI1POL
bits : 1 - 2 (2 bit)
access : read-write

EXTI2POL : EXTI2POL
bits : 2 - 4 (3 bit)
access : read-write

EXTI3POL : EXTI3POL
bits : 3 - 6 (4 bit)
access : read-write

EXTI4POL : EXTI4POL
bits : 4 - 8 (5 bit)
access : read-write

EXTI5POL : EXTI5POL
bits : 5 - 10 (6 bit)
access : read-write

EXTI6POL : EXTI6POL
bits : 6 - 12 (7 bit)
access : read-write

EXTI7POL : EXTI7POL
bits : 7 - 14 (8 bit)
access : read-write

EXTI8POL : EXTI8POL
bits : 8 - 16 (9 bit)
access : read-write

EXTI9POL : EXTI9POL
bits : 9 - 18 (10 bit)
access : read-write

EXTI10POL : EXTI10POL
bits : 10 - 20 (11 bit)
access : read-write

EXTI11POL : EXTI11POL
bits : 11 - 22 (12 bit)
access : read-write

EXTI12POL : EXTI12POL
bits : 12 - 24 (13 bit)
access : read-write

EXTI13POL : EXTI13POL
bits : 13 - 26 (14 bit)
access : read-write

EXTI14POL : EXTI14POL
bits : 14 - 28 (15 bit)
access : read-write

EXTI15POL : EXTI15POL
bits : 15 - 30 (16 bit)
access : read-write


EXTI_WAKUPFLG (WAKUPFLG)

EXTI_WAKUPFLG
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_WAKUPFLG EXTI_WAKUPFLG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0WFL EXTI1WFL EXTI2WFL EXTI3WFL EXTI4WFL EXTI5WFL EXTI6WFL EXTI7WFL EXTI8WFL EXTI9WFL EXTI10WFL EXTI11WFL EXTI12WFL EXTI13WFL EXTI14WFL EXTI15WFL

EXTI0WFL : EXTI0WFL
bits : 0 - 0 (1 bit)
access : read-write

EXTI1WFL : EXTI1WFL
bits : 1 - 2 (2 bit)
access : read-write

EXTI2WFL : EXTI2WFL
bits : 2 - 4 (3 bit)
access : read-write

EXTI3WFL : EXTI3WFL
bits : 3 - 6 (4 bit)
access : read-write

EXTI4WFL : EXTI4WFL
bits : 4 - 8 (5 bit)
access : read-write

EXTI5WFL : EXTI5WFL
bits : 5 - 10 (6 bit)
access : read-write

EXTI6WFL : EXTI6WFL
bits : 6 - 12 (7 bit)
access : read-write

EXTI7WFL : EXTI7WFL
bits : 7 - 14 (8 bit)
access : read-write

EXTI8WFL : EXTI8WFL
bits : 8 - 16 (9 bit)
access : read-write

EXTI9WFL : EXTI9WFL
bits : 9 - 18 (10 bit)
access : read-write

EXTI10WFL : EXTI10WFL
bits : 10 - 20 (11 bit)
access : read-write

EXTI11WFL : EXTI11WFL
bits : 11 - 22 (12 bit)
access : read-write

EXTI12WFL : EXTI12WFL
bits : 12 - 24 (13 bit)
access : read-write

EXTI13WFL : EXTI13WFL
bits : 13 - 26 (14 bit)
access : read-write

EXTI14WFL : EXTI14WFL
bits : 14 - 28 (15 bit)
access : read-write

EXTI15WFL : EXTI15WFL
bits : 15 - 30 (16 bit)
access : read-write


EXTI_CFGR2 (CFGR2)

EXTI_CFGR2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR2 EXTI_CFGR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write


EXTI_CFGR3 (CFGR3)

EXTI_CFGR3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTI_CFGR3 EXTI_CFGR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBCNT SRCTYPE DBEN

DBCNT : DBCNT
bits : 0 - 15 (16 bit)
access : read-write

SRCTYPE : SRCTYPE
bits : 28 - 58 (31 bit)
access : read-write

DBEN : DBEN
bits : 31 - 62 (32 bit)
access : read-write



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