\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
SCR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEEPONEXIT : SLEEPONEXIT
bits : 1 - 2 (2 bit)
access : read-write
SLEEPDEEP : SLEEPDEEP
bits : 2 - 4 (3 bit)
access : read-write
SEVONPEND : SEVONPEND
bits : 4 - 8 (5 bit)
access : read-write
CCR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NONEBASETHRDENA : NONEBASETHRDENA
bits : 0 - 0 (1 bit)
access : read-write
USERSETMPEND : USERSETMPEND
bits : 1 - 2 (2 bit)
access : read-write
UNALIGN_TRP : UNALIGN_TRP
bits : 3 - 6 (4 bit)
access : read-write
DIV_0_TRP : DIV_0_TRP
bits : 4 - 8 (5 bit)
access : read-write
BFHFNMIGN : BFHFNMIGN
bits : 8 - 16 (9 bit)
access : read-write
STKALIGN : STKALIGN
bits : 9 - 18 (10 bit)
access : read-write
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