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OPACMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

OPACR0

CMPISR0

OPACR1

OFVCR1

CMPIER1

CMPRSR1

CMPISR1

CMPICLR1

CMPICLR0

OFVCR0

CMPIER0

CMPRSR0


OPACR0

OPACR0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPACR0 OPACR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPA0EN OPC0MS A0OFM A0RS CMP0S

OPA0EN : OPA0EN
bits : 0 - 0 (1 bit)
access : read-write

OPC0MS : OPC0MS
bits : 1 - 2 (2 bit)
access : read-write

A0OFM : A0OFM
bits : 2 - 4 (3 bit)
access : read-write

A0RS : A0RS
bits : 3 - 6 (4 bit)
access : read-write

CMP0S : CMP0S
bits : 8 - 16 (9 bit)
access : read-write


CMPISR0

CMPISR0
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPISR0 CMPISR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF0IS CR0IS

CF0IS : CF0IS
bits : 0 - 0 (1 bit)
access : read-write

CR0IS : CR0IS
bits : 1 - 2 (2 bit)
access : read-write


OPACR1

OPACR1
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPACR1 OPACR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPA1EN OPC1MS A1OFM A1RS CMP1S

OPA1EN : OPA1EN
bits : 0 - 0 (1 bit)
access : read-write

OPC1MS : OPC1MS
bits : 1 - 2 (2 bit)
access : read-write

A1OFM : A1OFM
bits : 2 - 4 (3 bit)
access : read-write

A1RS : A1RS
bits : 3 - 6 (4 bit)
access : read-write

CMP1S : CMP1S
bits : 8 - 16 (9 bit)
access : read-write


OFVCR1

OFVCR1
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OFVCR1 OFVCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A1OF

A1OF : A1OF
bits : 0 - 5 (6 bit)
access : read-write


CMPIER1

CMPIER1
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPIER1 CMPIER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF1IEN CR1IEN

CF1IEN : CF1IEN
bits : 0 - 0 (1 bit)
access : read-write

CR1IEN : CR1IEN
bits : 1 - 2 (2 bit)
access : read-write


CMPRSR1

CMPRSR1
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPRSR1 CMPRSR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF1RAW CR1RAW

CF1RAW : CF1RAW
bits : 0 - 0 (1 bit)
access : read-write

CR1RAW : CR1RAW
bits : 1 - 2 (2 bit)
access : read-write


CMPISR1

CMPISR1
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPISR1 CMPISR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF1IS CR1IS

CF1IS : CF1IS
bits : 0 - 0 (1 bit)
access : read-write

CR1IS : CR1IS
bits : 1 - 2 (2 bit)
access : read-write


CMPICLR1

CMPICLR1
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPICLR1 CMPICLR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF1ICLR CR1ICLR

CF1ICLR : CF1ICLR
bits : 0 - 0 (1 bit)
access : read-write

CR1ICLR : CR1ICLR
bits : 1 - 2 (2 bit)
access : read-write


CMPICLR0

CMPICLR0
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPICLR0 CMPICLR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF0ICLR CR0ICLR

CF0ICLR : CF0ICLR
bits : 0 - 0 (1 bit)
access : read-write

CR0ICLR : CR0ICLR
bits : 1 - 2 (2 bit)
access : read-write


OFVCR0

OFVCR0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OFVCR0 OFVCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A0OF

A0OF : A0OF
bits : 0 - 5 (6 bit)
access : read-write


CMPIER0

CMPIER0
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPIER0 CMPIER0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF0IEN CR0IEN

CF0IEN : CF0IEN
bits : 0 - 0 (1 bit)
access : read-write

CR0IEN : CR0IEN
bits : 1 - 2 (2 bit)
access : read-write


CMPRSR0

CMPRSR0
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPRSR0 CMPRSR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CF0RAW CR0RAW

CF0RAW : CF0RAW
bits : 0 - 0 (1 bit)
access : read-write

CR0RAW : CR0RAW
bits : 1 - 2 (2 bit)
access : read-write



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