\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
MCTM_CNTCFR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UEV1DIS : UEV1DIS
bits : 0 - 0 (1 bit)
access : read-write
UGDIS : UGDIS
bits : 1 - 2 (2 bit)
access : read-write
CKDIV : CKDIV
bits : 8 - 17 (10 bit)
access : read-write
CMSEL : CMSEL
bits : 16 - 33 (18 bit)
access : read-write
DIR : DIR
bits : 24 - 48 (25 bit)
access : read-write
MCTM_CTR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TME : TME
bits : 0 - 0 (1 bit)
access : read-write
CRBE : CRBE
bits : 1 - 2 (2 bit)
access : read-write
COMPRE : COMPRE
bits : 8 - 16 (9 bit)
access : read-write
COMUS : COMUS
bits : 9 - 18 (10 bit)
access : read-write
CHCCDS : CHCCDS
bits : 16 - 32 (17 bit)
access : read-write
MCTM_CH0ICFR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TI0F : TI0F
bits : 0 - 3 (4 bit)
access : read-write
CH0CCS : CH0CCS
bits : 16 - 33 (18 bit)
access : read-write
CH0PSC : CH0PSC
bits : 18 - 37 (20 bit)
access : read-write
TI0SRC : TI0SRC
bits : 31 - 62 (32 bit)
access : read-write
MCTM_CH1ICFR
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TI1F : TI1F
bits : 0 - 3 (4 bit)
access : read-write
CH1CCS : CH1CCS
bits : 16 - 33 (18 bit)
access : read-write
CH1PSC : CH1PSC
bits : 18 - 37 (20 bit)
access : read-write
MCTM_CH2ICFR
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TI2F : TI2F
bits : 0 - 3 (4 bit)
access : read-write
CH2CCS : CH2CCS
bits : 16 - 33 (18 bit)
access : read-write
CH2PSC : CH2PSC
bits : 18 - 37 (20 bit)
access : read-write
MCTM_CH3ICFR
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TI3F : TI3F
bits : 0 - 3 (4 bit)
access : read-write
CH3CCS : CH3CCS
bits : 16 - 33 (18 bit)
access : read-write
CH3PSC : CH3PSC
bits : 18 - 37 (20 bit)
access : read-write
MCTM_MDCFR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TSE : TSE
bits : 0 - 0 (1 bit)
access : read-write
SMSEL : SMSEL
bits : 8 - 18 (11 bit)
access : read-write
MMSEL : MMSEL
bits : 16 - 34 (19 bit)
access : read-write
SPMSET : SPMSET
bits : 24 - 48 (25 bit)
access : read-write
MCTM_CH0OCFR
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0OM : CH0OM
bits : 0 - 2 (3 bit)
access : read-write
REF0CE : REF0CE
bits : 3 - 6 (4 bit)
access : read-write
CH0PRE : CH0PRE
bits : 4 - 8 (5 bit)
access : read-write
CH0IMAE : CH0IMAE
bits : 5 - 10 (6 bit)
access : read-write
CH0OM3 : CH0OM3
bits : 8 - 16 (9 bit)
access : read-write
MCTM_CH1OCFR
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH1OM : CH1OM
bits : 0 - 2 (3 bit)
access : read-write
REF1CE : REF1CE
bits : 3 - 6 (4 bit)
access : read-write
CH1PRE : CH1PRE
bits : 4 - 8 (5 bit)
access : read-write
CH1IMAE : CH1IMAE
bits : 5 - 10 (6 bit)
access : read-write
CH1OM3 : CH1OM3
bits : 8 - 16 (9 bit)
access : read-write
MCTM_CH2OCFR
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH2OM : CH2OM
bits : 0 - 2 (3 bit)
access : read-write
REF2CE : REF2CE
bits : 3 - 6 (4 bit)
access : read-write
CH2PRE : CH2PRE
bits : 4 - 8 (5 bit)
access : read-write
CH2IMAE : CH2IMAE
bits : 5 - 10 (6 bit)
access : read-write
CH2OM3 : CH2OM3
bits : 8 - 16 (9 bit)
access : read-write
MCTM_CH3OCFR
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH3OM : CH3OM
bits : 0 - 2 (3 bit)
access : read-write
REF3CE : REF3CE
bits : 3 - 6 (4 bit)
access : read-write
CH3PRE : CH3PRE
bits : 4 - 8 (5 bit)
access : read-write
CH3IMAE : CH3IMAE
bits : 5 - 10 (6 bit)
access : read-write
CH3OM3 : CH3OM3
bits : 8 - 16 (9 bit)
access : read-write
MCTM_CHCTR
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0E : CH0E
bits : 0 - 0 (1 bit)
access : read-write
CH0NE : CH0NE
bits : 1 - 2 (2 bit)
access : read-write
CH1E : CH1E
bits : 2 - 4 (3 bit)
access : read-write
CH1NE : CH1NE
bits : 3 - 6 (4 bit)
access : read-write
CH2E : CH2E
bits : 4 - 8 (5 bit)
access : read-write
CH2NE : CH2NE
bits : 5 - 10 (6 bit)
access : read-write
CH3E : CH3E
bits : 6 - 12 (7 bit)
access : read-write
MCTM_CHPOLR
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0P : CH0P
bits : 0 - 0 (1 bit)
access : read-write
CH0NP : CH0NP
bits : 1 - 2 (2 bit)
access : read-write
CH1P : CH1P
bits : 2 - 4 (3 bit)
access : read-write
CH1NP : CH1NP
bits : 3 - 6 (4 bit)
access : read-write
CH2P : CH2P
bits : 4 - 8 (5 bit)
access : read-write
CH2NP : CH2NP
bits : 5 - 10 (6 bit)
access : read-write
CH3P : CH3P
bits : 6 - 12 (7 bit)
access : read-write
MCTM_CHBRKCFR
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0OIS : CH0OIS
bits : 0 - 0 (1 bit)
access : read-write
CH0OISN : CH0OISN
bits : 1 - 2 (2 bit)
access : read-write
CH1OIS : CH1OIS
bits : 2 - 4 (3 bit)
access : read-write
CH1OISN : CH1OISN
bits : 3 - 6 (4 bit)
access : read-write
CH2OIS : CH2OIS
bits : 4 - 8 (5 bit)
access : read-write
CH2OISN : CH2OISN
bits : 5 - 10 (6 bit)
access : read-write
CH3OIS : CH3OIS
bits : 6 - 12 (7 bit)
access : read-write
MCTM_CHBRKCTR
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKE0 : BKE0
bits : 0 - 0 (1 bit)
access : read-write
BKP0 : BKP0
bits : 1 - 2 (2 bit)
access : read-write
BKE1 : BKE1
bits : 2 - 4 (3 bit)
access : read-write
BKP1 : BKP1
bits : 3 - 6 (4 bit)
access : read-write
CHMOE : CHMOE
bits : 4 - 8 (5 bit)
access : read-write
CHAOE : CHAOE
bits : 5 - 10 (6 bit)
access : read-write
BK1SEL : BK1SEL
bits : 6 - 12 (7 bit)
access : read-write
BKF0 : BKF0
bits : 8 - 19 (12 bit)
access : read-write
BKF1 : BKF1
bits : 12 - 27 (16 bit)
access : read-write
LOCKLV : LOCKLV
bits : 16 - 33 (18 bit)
access : read-write
GFSEL0 : GFSEL0
bits : 18 - 36 (19 bit)
access : read-write
GFSEL1 : GFSEL1
bits : 19 - 38 (20 bit)
access : read-write
CHOSSI : CHOSSI
bits : 20 - 40 (21 bit)
access : read-write
CHOSSR : CHOSSR
bits : 21 - 42 (22 bit)
access : read-write
CHDTG : CHDTG
bits : 24 - 55 (32 bit)
access : read-write
MCTM_DICTR
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCIE : CH0CCIE
bits : 0 - 0 (1 bit)
access : read-write
CH1CCIE : CH1CCIE
bits : 1 - 2 (2 bit)
access : read-write
CH2CCIE : CH2CCIE
bits : 2 - 4 (3 bit)
access : read-write
CH3CCIE : CH3CCIE
bits : 3 - 6 (4 bit)
access : read-write
UEV1IE : UEV1IE
bits : 8 - 16 (9 bit)
access : read-write
UEV2IE : UEV2IE
bits : 9 - 18 (10 bit)
access : read-write
TEVIE : TEVIE
bits : 10 - 20 (11 bit)
access : read-write
BRKIE : BRKIE
bits : 11 - 22 (12 bit)
access : read-write
CH0CCDE : CH0CCDE
bits : 16 - 32 (17 bit)
access : read-write
CH1CCDE : CH1CCDE
bits : 17 - 34 (18 bit)
access : read-write
CH2CCDE : CH2CCDE
bits : 18 - 36 (19 bit)
access : read-write
CH3CCDE : CH3CCDE
bits : 19 - 38 (20 bit)
access : read-write
UEV1DE : UEV1DE
bits : 24 - 48 (25 bit)
access : read-write
UEV2DE : UEV2DE
bits : 25 - 50 (26 bit)
access : read-write
TEVDE : TEVDE
bits : 26 - 52 (27 bit)
access : read-write
MCTM_EVGR
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCG : CH0CCG
bits : 0 - 0 (1 bit)
access : read-write
CH1CCG : CH1CCG
bits : 1 - 2 (2 bit)
access : read-write
CH2CCG : CH2CCG
bits : 2 - 4 (3 bit)
access : read-write
CH3CCG : CH3CCG
bits : 3 - 6 (4 bit)
access : read-write
UEV1G : UEV1G
bits : 8 - 16 (9 bit)
access : read-write
UEV2G : UEV2G
bits : 9 - 18 (10 bit)
access : read-write
TEVG : TEVG
bits : 10 - 20 (11 bit)
access : read-write
BRKG : BRKG
bits : 11 - 22 (12 bit)
access : read-write
MCTM_INTSR
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCIF : CH0CCIF
bits : 0 - 0 (1 bit)
access : read-write
CH1CCIF : CH1CCIF
bits : 1 - 2 (2 bit)
access : read-write
CH2CCIF : CH2CCIF
bits : 2 - 4 (3 bit)
access : read-write
CH3CCIF : CH3CCIF
bits : 3 - 6 (4 bit)
access : read-write
CH0OCF : CH0OCF
bits : 4 - 8 (5 bit)
access : read-write
CH1OCF : CH1OCF
bits : 5 - 10 (6 bit)
access : read-write
CH2OCF : CH2OCF
bits : 6 - 12 (7 bit)
access : read-write
CH3OCF : CH3OCF
bits : 7 - 14 (8 bit)
access : read-write
UEV1IF : UEV1IF
bits : 8 - 16 (9 bit)
access : read-write
UEV2IF : UEV2IF
bits : 9 - 18 (10 bit)
access : read-write
TEVIF : TEVIF
bits : 10 - 20 (11 bit)
access : read-write
BRK0IF : BRK0IF
bits : 11 - 22 (12 bit)
access : read-write
BRK1IF : BRK1IF
bits : 12 - 24 (13 bit)
access : read-write
MCTM_TRCFR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRSEL : TRSEL
bits : 0 - 3 (4 bit)
access : read-write
ETF : ETF
bits : 8 - 19 (12 bit)
access : read-write
ETIPSC : ETIPSC
bits : 12 - 25 (14 bit)
access : read-write
ETIPOL : ETIPOL
bits : 16 - 32 (17 bit)
access : read-write
ECME : ECME
bits : 24 - 48 (25 bit)
access : read-write
MCTM_CNTR
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNTV : CNTV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_PSCR
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSCV : PSCV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CRR
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRV : CRV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_REPR
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REPV : REPV
bits : 0 - 7 (8 bit)
access : read-write
MCTM_CH0CCR
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCV : CH0CCV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CH1CCR
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH1CCV : CH1CCV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CH2CCR
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH2CCV : CH2CCV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CH3CCR
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH3CCV : CH3CCV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CH0ACR
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0ACV : CH0ACV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CH1ACR
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH1ACV : CH1ACV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CH2ACR
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH2ACV : CH2ACV
bits : 0 - 15 (16 bit)
access : read-write
MCTM_CH3ACR
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH3ACV : CH3ACV
bits : 0 - 15 (16 bit)
access : read-write
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