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NVIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ISER

ICER

ISPR

ICPR

IPR0

IPR1

IPR2

IPR3

IPR4

IPR5

IPR6

IPR7


ISER

ISER
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISER ISER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA0 SETENA1 SETENA2 SETENA3 SETENA4 SETENA5 SETENA6 SETENA7 SETENA8 SETENA9 SETENA10 SETENA11 SETENA12 SETENA13 SETENA14 SETENA15 SETENA16 SETENA17 SETENA18 SETENA19 SETENA20 SETENA21 SETENA22 SETENA23 SETENA24 SETENA25 SETENA26 SETENA27 SETENA28 SETENA29 SETENA30 SETENA31

SETENA0 : SETENA0
bits : 0 - 0 (1 bit)
access : read-write

SETENA1 : SETENA1
bits : 1 - 2 (2 bit)
access : read-write

SETENA2 : SETENA2
bits : 2 - 4 (3 bit)
access : read-write

SETENA3 : SETENA3
bits : 3 - 6 (4 bit)
access : read-write

SETENA4 : SETENA4
bits : 4 - 8 (5 bit)
access : read-write

SETENA5 : SETENA5
bits : 5 - 10 (6 bit)
access : read-write

SETENA6 : SETENA6
bits : 6 - 12 (7 bit)
access : read-write

SETENA7 : SETENA7
bits : 7 - 14 (8 bit)
access : read-write

SETENA8 : SETENA8
bits : 8 - 16 (9 bit)
access : read-write

SETENA9 : SETENA9
bits : 9 - 18 (10 bit)
access : read-write

SETENA10 : SETENA10
bits : 10 - 20 (11 bit)
access : read-write

SETENA11 : SETENA11
bits : 11 - 22 (12 bit)
access : read-write

SETENA12 : SETENA12
bits : 12 - 24 (13 bit)
access : read-write

SETENA13 : SETENA13
bits : 13 - 26 (14 bit)
access : read-write

SETENA14 : SETENA14
bits : 14 - 28 (15 bit)
access : read-write

SETENA15 : SETENA15
bits : 15 - 30 (16 bit)
access : read-write

SETENA16 : SETENA16
bits : 16 - 32 (17 bit)
access : read-write

SETENA17 : SETENA17
bits : 17 - 34 (18 bit)
access : read-write

SETENA18 : SETENA18
bits : 18 - 36 (19 bit)
access : read-write

SETENA19 : SETENA19
bits : 19 - 38 (20 bit)
access : read-write

SETENA20 : SETENA20
bits : 20 - 40 (21 bit)
access : read-write

SETENA21 : SETENA21
bits : 21 - 42 (22 bit)
access : read-write

SETENA22 : SETENA22
bits : 22 - 44 (23 bit)
access : read-write

SETENA23 : SETENA23
bits : 23 - 46 (24 bit)
access : read-write

SETENA24 : SETENA24
bits : 24 - 48 (25 bit)
access : read-write

SETENA25 : SETENA25
bits : 25 - 50 (26 bit)
access : read-write

SETENA26 : SETENA26
bits : 26 - 52 (27 bit)
access : read-write

SETENA27 : SETENA27
bits : 27 - 54 (28 bit)
access : read-write

SETENA28 : SETENA28
bits : 28 - 56 (29 bit)
access : read-write

SETENA29 : SETENA29
bits : 29 - 58 (30 bit)
access : read-write

SETENA30 : SETENA30
bits : 30 - 60 (31 bit)
access : read-write

SETENA31 : SETENA31
bits : 31 - 62 (32 bit)
access : read-write


ICER

ICER
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICER ICER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA0 CLRENA1 CLRENA2 CLRENA3 CLRENA4 CLRENA5 CLRENA6 CLRENA7 CLRENA8 CLRENA9 CLRENA10 CLRENA11 CLRENA12 CLRENA13 CLRENA14 CLRENA15 CLRENA16 CLRENA17 CLRENA18 CLRENA19 CLRENA20 CLRENA21 CLRENA22 CLRENA23 CLRENA24 CLRENA25 CLRENA26 CLRENA27 CLRENA28 CLRENA29 CLRENA30 CLRENA31

CLRENA0 : CLRENA0
bits : 0 - 0 (1 bit)
access : read-write

CLRENA1 : CLRENA1
bits : 1 - 2 (2 bit)
access : read-write

CLRENA2 : CLRENA2
bits : 2 - 4 (3 bit)
access : read-write

CLRENA3 : CLRENA3
bits : 3 - 6 (4 bit)
access : read-write

CLRENA4 : CLRENA4
bits : 4 - 8 (5 bit)
access : read-write

CLRENA5 : CLRENA5
bits : 5 - 10 (6 bit)
access : read-write

CLRENA6 : CLRENA6
bits : 6 - 12 (7 bit)
access : read-write

CLRENA7 : CLRENA7
bits : 7 - 14 (8 bit)
access : read-write

CLRENA8 : CLRENA8
bits : 8 - 16 (9 bit)
access : read-write

CLRENA9 : CLRENA9
bits : 9 - 18 (10 bit)
access : read-write

CLRENA10 : CLRENA10
bits : 10 - 20 (11 bit)
access : read-write

CLRENA11 : CLRENA11
bits : 11 - 22 (12 bit)
access : read-write

CLRENA12 : CLRENA12
bits : 12 - 24 (13 bit)
access : read-write

CLRENA13 : CLRENA13
bits : 13 - 26 (14 bit)
access : read-write

CLRENA14 : CLRENA14
bits : 14 - 28 (15 bit)
access : read-write

CLRENA15 : CLRENA15
bits : 15 - 30 (16 bit)
access : read-write

CLRENA16 : CLRENA16
bits : 16 - 32 (17 bit)
access : read-write

CLRENA17 : CLRENA17
bits : 17 - 34 (18 bit)
access : read-write

CLRENA18 : CLRENA18
bits : 18 - 36 (19 bit)
access : read-write

CLRENA19 : CLRENA19
bits : 19 - 38 (20 bit)
access : read-write

CLRENA20 : CLRENA20
bits : 20 - 40 (21 bit)
access : read-write

CLRENA21 : CLRENA21
bits : 21 - 42 (22 bit)
access : read-write

CLRENA22 : CLRENA22
bits : 22 - 44 (23 bit)
access : read-write

CLRENA23 : CLRENA23
bits : 23 - 46 (24 bit)
access : read-write

CLRENA24 : CLRENA24
bits : 24 - 48 (25 bit)
access : read-write

CLRENA25 : CLRENA25
bits : 25 - 50 (26 bit)
access : read-write

CLRENA26 : CLRENA26
bits : 26 - 52 (27 bit)
access : read-write

CLRENA27 : CLRENA27
bits : 27 - 54 (28 bit)
access : read-write

CLRENA28 : CLRENA28
bits : 28 - 56 (29 bit)
access : read-write

CLRENA29 : CLRENA29
bits : 29 - 58 (30 bit)
access : read-write

CLRENA30 : CLRENA30
bits : 30 - 60 (31 bit)
access : read-write

CLRENA31 : CLRENA31
bits : 31 - 62 (32 bit)
access : read-write


ISPR

ISPR
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISPR ISPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND0 SETPEND1 SETPEND2 SETPEND3 SETPEND4 SETPEND5 SETPEND6 SETPEND7 SETPEND8 SETPEND9 SETPEND10 SETPEND11 SETPEND12 SETPEND13 SETPEND14 SETPEND15 SETPEND16 SETPEND17 SETPEND18 SETPEND19 SETPEND20 SETPEND21 SETPEND22 SETPEND23 SETPEND24 SETPEND25 SETPEND26 SETPEND27 SETPEND28 SETPEND29 SETPEND30 SETPEND31

SETPEND0 : SETPEND0
bits : 0 - 0 (1 bit)
access : read-write

SETPEND1 : SETPEND1
bits : 1 - 2 (2 bit)
access : read-write

SETPEND2 : SETPEND2
bits : 2 - 4 (3 bit)
access : read-write

SETPEND3 : SETPEND3
bits : 3 - 6 (4 bit)
access : read-write

SETPEND4 : SETPEND4
bits : 4 - 8 (5 bit)
access : read-write

SETPEND5 : SETPEND5
bits : 5 - 10 (6 bit)
access : read-write

SETPEND6 : SETPEND6
bits : 6 - 12 (7 bit)
access : read-write

SETPEND7 : SETPEND7
bits : 7 - 14 (8 bit)
access : read-write

SETPEND8 : SETPEND8
bits : 8 - 16 (9 bit)
access : read-write

SETPEND9 : SETPEND9
bits : 9 - 18 (10 bit)
access : read-write

SETPEND10 : SETPEND10
bits : 10 - 20 (11 bit)
access : read-write

SETPEND11 : SETPEND11
bits : 11 - 22 (12 bit)
access : read-write

SETPEND12 : SETPEND12
bits : 12 - 24 (13 bit)
access : read-write

SETPEND13 : SETPEND13
bits : 13 - 26 (14 bit)
access : read-write

SETPEND14 : SETPEND14
bits : 14 - 28 (15 bit)
access : read-write

SETPEND15 : SETPEND15
bits : 15 - 30 (16 bit)
access : read-write

SETPEND16 : SETPEND16
bits : 16 - 32 (17 bit)
access : read-write

SETPEND17 : SETPEND17
bits : 17 - 34 (18 bit)
access : read-write

SETPEND18 : SETPEND18
bits : 18 - 36 (19 bit)
access : read-write

SETPEND19 : SETPEND19
bits : 19 - 38 (20 bit)
access : read-write

SETPEND20 : SETPEND20
bits : 20 - 40 (21 bit)
access : read-write

SETPEND21 : SETPEND21
bits : 21 - 42 (22 bit)
access : read-write

SETPEND22 : SETPEND22
bits : 22 - 44 (23 bit)
access : read-write

SETPEND23 : SETPEND23
bits : 23 - 46 (24 bit)
access : read-write

SETPEND24 : SETPEND24
bits : 24 - 48 (25 bit)
access : read-write

SETPEND25 : SETPEND25
bits : 25 - 50 (26 bit)
access : read-write

SETPEND26 : SETPEND26
bits : 26 - 52 (27 bit)
access : read-write

SETPEND27 : SETPEND27
bits : 27 - 54 (28 bit)
access : read-write

SETPEND28 : SETPEND28
bits : 28 - 56 (29 bit)
access : read-write

SETPEND29 : SETPEND29
bits : 29 - 58 (30 bit)
access : read-write

SETPEND30 : SETPEND30
bits : 30 - 60 (31 bit)
access : read-write

SETPEND31 : SETPEND31
bits : 31 - 62 (32 bit)
access : read-write


ICPR

ICPR
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICPR ICPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND0 CLRPEND1 CLRPEND2 CLRPEND3 CLRPEND4 CLRPEND5 CLRPEND6 CLRPEND7 CLRPEND8 CLRPEND9 CLRPEND10 CLRPEND11 CLRPEND12 CLRPEND13 CLRPEND14 CLRPEND15 CLRPEND16 CLRPEND17 CLRPEND18 CLRPEND19 CLRPEND20 CLRPEND21 CLRPEND22 CLRPEND23 CLRPEND24 CLRPEND25 CLRPEND26 CLRPEND27 CLRPEND28 CLRPEND29 CLRPEND30 CLRPEND31

CLRPEND0 : CLRPEND0
bits : 0 - 0 (1 bit)
access : read-write

CLRPEND1 : CLRPEND1
bits : 1 - 2 (2 bit)
access : read-write

CLRPEND2 : CLRPEND2
bits : 2 - 4 (3 bit)
access : read-write

CLRPEND3 : CLRPEND3
bits : 3 - 6 (4 bit)
access : read-write

CLRPEND4 : CLRPEND4
bits : 4 - 8 (5 bit)
access : read-write

CLRPEND5 : CLRPEND5
bits : 5 - 10 (6 bit)
access : read-write

CLRPEND6 : CLRPEND6
bits : 6 - 12 (7 bit)
access : read-write

CLRPEND7 : CLRPEND7
bits : 7 - 14 (8 bit)
access : read-write

CLRPEND8 : CLRPEND8
bits : 8 - 16 (9 bit)
access : read-write

CLRPEND9 : CLRPEND9
bits : 9 - 18 (10 bit)
access : read-write

CLRPEND10 : CLRPEND10
bits : 10 - 20 (11 bit)
access : read-write

CLRPEND11 : CLRPEND11
bits : 11 - 22 (12 bit)
access : read-write

CLRPEND12 : CLRPEND12
bits : 12 - 24 (13 bit)
access : read-write

CLRPEND13 : CLRPEND13
bits : 13 - 26 (14 bit)
access : read-write

CLRPEND14 : CLRPEND14
bits : 14 - 28 (15 bit)
access : read-write

CLRPEND15 : CLRPEND15
bits : 15 - 30 (16 bit)
access : read-write

CLRPEND16 : CLRPEND16
bits : 16 - 32 (17 bit)
access : read-write

CLRPEND17 : CLRPEND17
bits : 17 - 34 (18 bit)
access : read-write

CLRPEND18 : CLRPEND18
bits : 18 - 36 (19 bit)
access : read-write

CLRPEND19 : CLRPEND19
bits : 19 - 38 (20 bit)
access : read-write

CLRPEND20 : CLRPEND20
bits : 20 - 40 (21 bit)
access : read-write

CLRPEND21 : CLRPEND21
bits : 21 - 42 (22 bit)
access : read-write

CLRPEND22 : CLRPEND22
bits : 22 - 44 (23 bit)
access : read-write

CLRPEND23 : CLRPEND23
bits : 23 - 46 (24 bit)
access : read-write

CLRPEND24 : CLRPEND24
bits : 24 - 48 (25 bit)
access : read-write

CLRPEND25 : CLRPEND25
bits : 25 - 50 (26 bit)
access : read-write

CLRPEND26 : CLRPEND26
bits : 26 - 52 (27 bit)
access : read-write

CLRPEND27 : CLRPEND27
bits : 27 - 54 (28 bit)
access : read-write

CLRPEND28 : CLRPEND28
bits : 28 - 56 (29 bit)
access : read-write

CLRPEND29 : CLRPEND29
bits : 29 - 58 (30 bit)
access : read-write

CLRPEND30 : CLRPEND30
bits : 30 - 60 (31 bit)
access : read-write

CLRPEND31 : CLRPEND31
bits : 31 - 62 (32 bit)
access : read-write


IPR0

IPR0
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR0 IPR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_0 PRI_1 PRI_2 PRI_3

PRI_0 : PRI_0
bits : 0 - 7 (8 bit)
access : read-write

PRI_1 : PRI_1
bits : 8 - 23 (16 bit)
access : read-write

PRI_2 : PRI_2
bits : 16 - 39 (24 bit)
access : read-write

PRI_3 : PRI_3
bits : 24 - 55 (32 bit)
access : read-write


IPR1

IPR1
address_offset : 0x404 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR1 IPR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_4 PRI_5 PRI_6 PRI_7

PRI_4 : PRI_4
bits : 0 - 7 (8 bit)
access : read-write

PRI_5 : PRI_5
bits : 8 - 23 (16 bit)
access : read-write

PRI_6 : PRI_6
bits : 16 - 39 (24 bit)
access : read-write

PRI_7 : PRI_7
bits : 24 - 55 (32 bit)
access : read-write


IPR2

IPR2
address_offset : 0x408 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR2 IPR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_8 PRI_9 PRI_10 PRI_11

PRI_8 : PRI_8
bits : 0 - 7 (8 bit)
access : read-write

PRI_9 : PRI_9
bits : 8 - 23 (16 bit)
access : read-write

PRI_10 : PRI_10
bits : 16 - 39 (24 bit)
access : read-write

PRI_11 : PRI_11
bits : 24 - 55 (32 bit)
access : read-write


IPR3

IPR3
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR3 IPR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_12 PRI_13 PRI_14 PRI_15

PRI_12 : PRI_12
bits : 0 - 7 (8 bit)
access : read-write

PRI_13 : PRI_13
bits : 8 - 23 (16 bit)
access : read-write

PRI_14 : PRI_14
bits : 16 - 39 (24 bit)
access : read-write

PRI_15 : PRI_15
bits : 24 - 55 (32 bit)
access : read-write


IPR4

IPR4
address_offset : 0x410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR4 IPR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_16 PRI_17 PRI_18 PRI_19

PRI_16 : PRI_16
bits : 0 - 7 (8 bit)
access : read-write

PRI_17 : PRI_17
bits : 8 - 23 (16 bit)
access : read-write

PRI_18 : PRI_18
bits : 16 - 39 (24 bit)
access : read-write

PRI_19 : PRI_19
bits : 24 - 55 (32 bit)
access : read-write


IPR5

IPR5
address_offset : 0x414 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR5 IPR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_20 PRI_21 PRI_22 PRI_23

PRI_20 : PRI_20
bits : 0 - 7 (8 bit)
access : read-write

PRI_21 : PRI_21
bits : 8 - 23 (16 bit)
access : read-write

PRI_22 : PRI_22
bits : 16 - 39 (24 bit)
access : read-write

PRI_23 : PRI_23
bits : 24 - 55 (32 bit)
access : read-write


IPR6

IPR6
address_offset : 0x418 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR6 IPR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_24 PRI_25 PRI_26 PRI_27

PRI_24 : PRI_24
bits : 0 - 7 (8 bit)
access : read-write

PRI_25 : PRI_25
bits : 8 - 23 (16 bit)
access : read-write

PRI_26 : PRI_26
bits : 16 - 39 (24 bit)
access : read-write

PRI_27 : PRI_27
bits : 24 - 55 (32 bit)
access : read-write


IPR7

IPR7
address_offset : 0x41C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR7 IPR7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_28 PRI_29 PRI_30 PRI_31

PRI_28 : PRI_28
bits : 0 - 7 (8 bit)
access : read-write

PRI_29 : PRI_29
bits : 8 - 23 (16 bit)
access : read-write

PRI_30 : PRI_30
bits : 16 - 39 (24 bit)
access : read-write

PRI_31 : PRI_31
bits : 24 - 55 (32 bit)
access : read-write



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