\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
SPI_CR0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPIEN : SPIEN
bits : 0 - 0 (1 bit)
access : read-write
TXDMAE : TXDMAE
bits : 1 - 2 (2 bit)
access : read-write
RXDMAE : RXDMAE
bits : 2 - 4 (3 bit)
access : read-write
SELOEN : SELOEN
bits : 3 - 6 (4 bit)
access : read-write
SSELC : SSELC
bits : 4 - 8 (5 bit)
access : read-write
DUALEN : DUALEN
bits : 6 - 12 (7 bit)
access : read-write
GUADTEN : GUADTEN
bits : 7 - 14 (8 bit)
access : read-write
GUADT : GUADT
bits : 8 - 19 (12 bit)
access : read-write
SELHT : SELHT
bits : 12 - 27 (16 bit)
access : read-write
SPI_DR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DR : DR
bits : 0 - 15 (16 bit)
access : read-write
SPI_SR
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXBE : TXBE
bits : 0 - 0 (1 bit)
access : read-write
TXE : TXE
bits : 1 - 2 (2 bit)
access : read-write
RXBNE : RXBNE
bits : 2 - 4 (3 bit)
access : read-write
WC : WC
bits : 3 - 6 (4 bit)
access : read-write
RO : RO
bits : 4 - 8 (5 bit)
access : read-write
MF : MF
bits : 5 - 10 (6 bit)
access : read-write
SA : SA
bits : 6 - 12 (7 bit)
access : read-write
TO : TO
bits : 7 - 14 (8 bit)
access : read-write
BUSY : BUSY
bits : 8 - 16 (9 bit)
access : read-write
SPI_FCR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXFTLS : TXFTLS
bits : 0 - 3 (4 bit)
access : read-write
RXFTLS : RXFTLS
bits : 4 - 11 (8 bit)
access : read-write
FIFOEN : FIFOEN
bits : 10 - 20 (11 bit)
access : read-write
SPI_FSR
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXFS : TXFS
bits : 0 - 3 (4 bit)
access : read-write
RXFS : RXFS
bits : 4 - 11 (8 bit)
access : read-write
SPI_FTOCR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOC : TOC
bits : 0 - 15 (16 bit)
access : read-write
SPI_CR1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DFL : DFL
bits : 0 - 3 (4 bit)
access : read-write
FORMAT : FORMAT
bits : 8 - 18 (11 bit)
access : read-write
SELAP : SELAP
bits : 11 - 22 (12 bit)
access : read-write
FIRSTBIT : FIRSTBIT
bits : 12 - 24 (13 bit)
access : read-write
SELM : SELM
bits : 13 - 26 (14 bit)
access : read-write
MODE : MODE
bits : 14 - 28 (15 bit)
access : read-write
SPI_IER
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXBEIEN : TXBEIEN
bits : 0 - 0 (1 bit)
access : read-write
TXEIEN : TXEIEN
bits : 1 - 2 (2 bit)
access : read-write
RXBNEIEN : RXBNEIEN
bits : 2 - 4 (3 bit)
access : read-write
WCIEN : WCIEN
bits : 3 - 6 (4 bit)
access : read-write
ROIEN : ROIEN
bits : 4 - 8 (5 bit)
access : read-write
MFIEN : MFIEN
bits : 5 - 10 (6 bit)
access : read-write
SAIEN : SAIEN
bits : 6 - 12 (7 bit)
access : read-write
TOIEN : TOIEN
bits : 7 - 14 (8 bit)
access : read-write
SPI_CPR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CP : CP
bits : 0 - 15 (16 bit)
access : read-write
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