\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
SCTM_CNTCFR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UEVDIS : UEVDIS
bits : 0 - 0 (1 bit)
access : read-write
UGDIS : UGDIS
bits : 1 - 2 (2 bit)
access : read-write
CKDIV : CKDIV
bits : 8 - 17 (10 bit)
access : read-write
CMSEL : CMSEL
bits : 16 - 33 (18 bit)
access : read-write
DIR : DIR
bits : 24 - 48 (25 bit)
access : read-write
GPTM_CTR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TME : TME
bits : 0 - 0 (1 bit)
access : read-write
CRBE : CRBE
bits : 1 - 2 (2 bit)
access : read-write
CHCCDS : CHCCDS
bits : 16 - 32 (17 bit)
access : read-write
GPTM_CH0ICFR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TI0F : TI0F
bits : 0 - 3 (4 bit)
access : read-write
CH0CCS : CH0CCS
bits : 16 - 33 (18 bit)
access : read-write
CH0PSC : CH0PSC
bits : 18 - 37 (20 bit)
access : read-write
TI0SRC : TI0SRC
bits : 31 - 62 (32 bit)
access : read-write
GPTM_MDCFR
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TSE : TSE
bits : 0 - 0 (1 bit)
access : read-write
SMSEL : SMSEL
bits : 8 - 18 (11 bit)
access : read-write
MMSEL : MMSEL
bits : 16 - 34 (19 bit)
access : read-write
SPMSET : SPMSET
bits : 24 - 48 (25 bit)
access : read-write
GPTM_CH1OCFR
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH1OM : CH1OM
bits : 0 - 2 (3 bit)
access : read-write
CH1PRE : CH1PRE
bits : 4 - 8 (5 bit)
access : read-write
CH1IMAE : CH1IMAE
bits : 5 - 10 (6 bit)
access : read-write
CH1OM3 : CH1OM3
bits : 8 - 16 (9 bit)
access : read-write
GPTM_CHCTR
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0E : CH0E
bits : 0 - 0 (1 bit)
access : read-write
CH1E : CH1E
bits : 2 - 4 (3 bit)
access : read-write
CH2E : CH2E
bits : 4 - 8 (5 bit)
access : read-write
CH3E : CH3E
bits : 6 - 12 (7 bit)
access : read-write
GPTM_CHPOLR
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0P : CH0P
bits : 0 - 0 (1 bit)
access : read-write
CH1P : CH1P
bits : 2 - 4 (3 bit)
access : read-write
CH2P : CH2P
bits : 4 - 8 (5 bit)
access : read-write
CH3P : CH3P
bits : 6 - 12 (7 bit)
access : read-write
GPTM_DICTR
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCIE : CH0CCIE
bits : 0 - 0 (1 bit)
access : read-write
CH1CCIE : CH1CCIE
bits : 1 - 2 (2 bit)
access : read-write
CH2CCIE : CH2CCIE
bits : 2 - 4 (3 bit)
access : read-write
CH3CCIE : CH3CCIE
bits : 3 - 6 (4 bit)
access : read-write
UEVIE : UEVIE
bits : 8 - 16 (9 bit)
access : read-write
TEVIE : TEVIE
bits : 10 - 20 (11 bit)
access : read-write
CH0CCDE : CH0CCDE
bits : 16 - 32 (17 bit)
access : read-write
CH1CCDE : CH1CCDE
bits : 17 - 34 (18 bit)
access : read-write
CH2CCDE : CH2CCDE
bits : 18 - 36 (19 bit)
access : read-write
CH3CCDE : CH3CCDE
bits : 19 - 38 (20 bit)
access : read-write
UEVDE : UEVDE
bits : 24 - 48 (25 bit)
access : read-write
TEVDE : TEVDE
bits : 26 - 52 (27 bit)
access : read-write
GPTM_EVGR
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCG : CH0CCG
bits : 0 - 0 (1 bit)
access : read-write
CH1CCG : CH1CCG
bits : 1 - 2 (2 bit)
access : read-write
CH2CCG : CH2CCG
bits : 2 - 4 (3 bit)
access : read-write
CH3CCG : CH3CCG
bits : 3 - 6 (4 bit)
access : read-write
UEVG : UEVG
bits : 8 - 16 (9 bit)
access : read-write
TEVG : TEVG
bits : 10 - 20 (11 bit)
access : read-write
GPTM_INTSR
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCIF : CH0CCIF
bits : 0 - 0 (1 bit)
access : read-write
CH1CCIF : CH1CCIF
bits : 1 - 2 (2 bit)
access : read-write
CH2CCIF : CH2CCIF
bits : 2 - 4 (3 bit)
access : read-write
CH3CCIF : CH3CCIF
bits : 3 - 6 (4 bit)
access : read-write
CH0OCF : CH0OCF
bits : 4 - 8 (5 bit)
access : read-write
CH1OCF : CH1OCF
bits : 5 - 10 (6 bit)
access : read-write
CH2OCF : CH2OCF
bits : 6 - 12 (7 bit)
access : read-write
CH3OCF : CH3OCF
bits : 7 - 14 (8 bit)
access : read-write
UEVIF : UEVIF
bits : 8 - 16 (9 bit)
access : read-write
TEVIF : TEVIF
bits : 10 - 20 (11 bit)
access : read-write
GPTM_TRCFR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRSEL : TRSEL
bits : 0 - 3 (4 bit)
access : read-write
GPTM_CNTR
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNTV : CNTV
bits : 0 - 15 (16 bit)
access : read-write
GPTM_PSCR
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSCV : PSCV
bits : 0 - 15 (16 bit)
access : read-write
GPTM_CRR
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRV : CRV
bits : 0 - 15 (16 bit)
access : read-write
GPTM_CH0CCR
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0CCV : CH0CCV
bits : 0 - 15 (16 bit)
access : read-write
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