\n
address_offset : 0x0 Bytes (0x0)
size : 0x3D byte (0x0)
mem_usage : registers
protection : not protected
desc PERICKSEL
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERICKSEL : desc PERICKSEL
bits : 0 - 1 (2 bit)
access : read-write
desc XTALCR
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTALSTP : desc XTALSTP
bits : 0 - -1 (0 bit)
access : read-write
desc XTALCFGR
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTALDRV : desc XTALDRV
bits : 4 - 4 (1 bit)
access : read-write
XTALMS : desc XTALMS
bits : 6 - 5 (0 bit)
access : read-write
SUPDRV : desc SUPDRV
bits : 7 - 6 (0 bit)
access : read-write
desc XTALSTBCR
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTALSTB : desc XTALSTB
bits : 0 - 1 (2 bit)
access : read-write
desc HRCCR
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HRCSTP : desc HRCSTP
bits : 0 - -1 (0 bit)
access : read-write
desc OSCSTBSR
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
HRCSTBF : desc HRCSTBF
bits : 0 - -1 (0 bit)
access : read-only
XTALSTBF : desc XTALSTBF
bits : 3 - 2 (0 bit)
access : read-only
XTAL32STBF : desc XTAL32STBF
bits : 4 - 3 (0 bit)
access : read-only
desc MCO1CFGR
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCO1SEL : desc MCO1SEL
bits : 0 - 2 (3 bit)
access : read-write
MCO1DIV : desc MCO1DIV
bits : 4 - 5 (2 bit)
access : read-write
MCO1EN : desc MCO1EN
bits : 7 - 6 (0 bit)
access : read-write
desc XTALSTDCR
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTALSTDIE : desc XTALSTDIE
bits : 0 - -1 (0 bit)
access : read-write
XTALSTDRE : desc XTALSTDRE
bits : 1 - 0 (0 bit)
access : read-write
XTALSTDRIS : desc XTALSTDRIS
bits : 2 - 1 (0 bit)
access : read-write
XTALSTDE : desc XTALSTDE
bits : 7 - 6 (0 bit)
access : read-write
desc FCG
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADC : desc ADC
bits : 0 - -1 (0 bit)
access : read-write
CTC : desc CTC
bits : 1 - 0 (0 bit)
access : read-write
AOS : desc AOS
bits : 4 - 3 (0 bit)
access : read-write
CRC : desc CRC
bits : 7 - 6 (0 bit)
access : read-write
TIMB1 : desc TIMB1
bits : 8 - 7 (0 bit)
access : read-write
TIMB2 : desc TIMB2
bits : 9 - 8 (0 bit)
access : read-write
TIMB3 : desc TIMB3
bits : 10 - 9 (0 bit)
access : read-write
TIMB4 : desc TIMB4
bits : 11 - 10 (0 bit)
access : read-write
TIMB5 : desc TIMB5
bits : 12 - 11 (0 bit)
access : read-write
TIMB6 : desc TIMB6
bits : 13 - 12 (0 bit)
access : read-write
TIMB7 : desc TIMB7
bits : 14 - 13 (0 bit)
access : read-write
TIMB8 : desc TIMB8
bits : 15 - 14 (0 bit)
access : read-write
TIM0 : desc TIM0
bits : 16 - 15 (0 bit)
access : read-write
RTC : desc RTC
bits : 23 - 22 (0 bit)
access : read-write
UART1 : desc UART1
bits : 24 - 23 (0 bit)
access : read-write
UART2 : desc UART2
bits : 25 - 24 (0 bit)
access : read-write
UART3 : desc UART3
bits : 26 - 25 (0 bit)
access : read-write
UART4 : desc UART4
bits : 27 - 26 (0 bit)
access : read-write
IIC : desc IIC
bits : 28 - 27 (0 bit)
access : read-write
SPI : desc SPI
bits : 29 - 28 (0 bit)
access : read-write
desc XTAL32CR
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTAL32STP : desc XTAL32STP
bits : 0 - -1 (0 bit)
access : read-write
desc XTAL32CFGR
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTAL32DRV : desc XTAL32DRV
bits : 0 - 0 (1 bit)
access : read-write
XTAL32SUPDRV : desc XTAL32SUPDRV
bits : 2 - 1 (0 bit)
access : read-write
desc XTAL32NFR
address_offset : 0x39 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTAL32NF : desc XTAL32NF
bits : 0 - 0 (1 bit)
access : read-write
desc LRCCR
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LRCSTP : desc LRCSTP
bits : 0 - -1 (0 bit)
access : read-write
desc XTALSTDSR
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XTALSTDF : desc XTALSTDF
bits : 0 - -1 (0 bit)
access : read-write
desc SCKDIVR
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCKDIV : desc SCKDIV
bits : 0 - 1 (2 bit)
access : read-write
desc CKSWR
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CKSW : desc CKSW
bits : 0 - 0 (1 bit)
access : read-write
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