\n
address_offset : 0x0 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected
desc DR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPD : desc SPD
bits : 0 - 14 (15 bit)
access : read-write
desc SR
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OVRERF : desc OVRERF
bits : 0 - -1 (0 bit)
access : read-write
IDLNF : desc IDLNF
bits : 1 - 0 (0 bit)
access : read-only
MODFERF : desc MODFERF
bits : 2 - 1 (0 bit)
access : read-write
PERF : desc PERF
bits : 3 - 2 (0 bit)
access : read-write
UDRERF : desc UDRERF
bits : 4 - 3 (0 bit)
access : read-write
TDEF : desc TDEF
bits : 5 - 4 (0 bit)
access : read-write
RDFF : desc RDFF
bits : 7 - 6 (0 bit)
access : read-write
desc CFG2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CPHA : desc CPHA
bits : 0 - -1 (0 bit)
access : read-write
CPOL : desc CPOL
bits : 1 - 0 (0 bit)
access : read-write
MBR : desc MBR
bits : 2 - 3 (2 bit)
access : read-write
DSIZE : desc DSIZE
bits : 8 - 7 (0 bit)
access : read-write
LSBF : desc LSBF
bits : 12 - 11 (0 bit)
access : read-write
desc CR1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPIMDS : desc SPIMDS
bits : 0 - -1 (0 bit)
access : read-write
TXMDS : desc TXMDS
bits : 1 - 0 (0 bit)
access : read-write
MSTR : desc MSTR
bits : 3 - 2 (0 bit)
access : read-write
SPLPBK : desc SPLPBK
bits : 4 - 3 (0 bit)
access : read-write
SPLPBK2 : desc SPLPBK2
bits : 5 - 4 (0 bit)
access : read-write
SPE : desc SPE
bits : 6 - 5 (0 bit)
access : read-write
EIE : desc EIE
bits : 8 - 7 (0 bit)
access : read-write
TXIE : desc TXIE
bits : 9 - 8 (0 bit)
access : read-write
RXIE : desc RXIE
bits : 10 - 9 (0 bit)
access : read-write
IDIE : desc IDIE
bits : 11 - 10 (0 bit)
access : read-write
MODFE : desc MODFE
bits : 12 - 11 (0 bit)
access : read-write
PATE : desc PATE
bits : 13 - 12 (0 bit)
access : read-write
PAOE : desc PAOE
bits : 14 - 13 (0 bit)
access : read-write
PAE : desc PAE
bits : 15 - 14 (0 bit)
access : read-write
desc CFG1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SS0PV : desc SS0PV
bits : 8 - 7 (0 bit)
access : read-write
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.