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TMR2

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CNTAR

BCONR

ICONR

PCONR

HCONR

STFLR

CMPAR


CNTAR

desc CNTAR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNTAR CNTAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNTA

CNTA : desc CNTA
bits : 0 - 14 (15 bit)
access : read-write


BCONR

desc BCONR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BCONR BCONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSTA CAPMDA SYNSA CKDIVA SYNCLKA ASYNCLKA

CSTA : desc CSTA
bits : 0 - -1 (0 bit)
access : read-write

CAPMDA : desc CAPMDA
bits : 1 - 0 (0 bit)
access : read-write

SYNSA : desc SYNSA
bits : 3 - 2 (0 bit)
access : read-write

CKDIVA : desc CKDIVA
bits : 4 - 6 (3 bit)
access : read-write

SYNCLKA : desc SYNCLKA
bits : 8 - 8 (1 bit)
access : read-write

ASYNCLKA : desc ASYNCLKA
bits : 10 - 10 (1 bit)
access : read-write


ICONR

desc ICONR
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICONR ICONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMENA OVENA

CMENA : desc CMENA
bits : 0 - -1 (0 bit)
access : read-write

OVENA : desc OVENA
bits : 1 - 0 (0 bit)
access : read-write


PCONR

desc PCONR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCONR PCONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STACA STPCA CMPCA OUTENA NOFIENA NOFICKA

STACA : desc STACA
bits : 0 - 0 (1 bit)
access : read-write

STPCA : desc STPCA
bits : 2 - 2 (1 bit)
access : read-write

CMPCA : desc CMPCA
bits : 4 - 4 (1 bit)
access : read-write

OUTENA : desc OUTENA
bits : 8 - 7 (0 bit)
access : read-write

NOFIENA : desc NOFIENA
bits : 12 - 11 (0 bit)
access : read-write

NOFICKA : desc NOFICKA
bits : 13 - 13 (1 bit)
access : read-write


HCONR

desc HCONR
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HCONR HCONR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HSTA0 HSTA1 HSTA2 HSTP0 HSTP1 HSTP2 HCLE0 HCLE1 HCLE2 HICP0 HICP1 HICP2

HSTA0 : desc HSTA0
bits : 0 - -1 (0 bit)
access : read-write

HSTA1 : desc HSTA1
bits : 1 - 0 (0 bit)
access : read-write

HSTA2 : desc HSTA2
bits : 2 - 1 (0 bit)
access : read-write

HSTP0 : desc HSTP0
bits : 4 - 3 (0 bit)
access : read-write

HSTP1 : desc HSTP1
bits : 5 - 4 (0 bit)
access : read-write

HSTP2 : desc HSTP2
bits : 6 - 5 (0 bit)
access : read-write

HCLE0 : desc HCLE0
bits : 8 - 7 (0 bit)
access : read-write

HCLE1 : desc HCLE1
bits : 9 - 8 (0 bit)
access : read-write

HCLE2 : desc HCLE2
bits : 10 - 9 (0 bit)
access : read-write

HICP0 : desc HICP0
bits : 12 - 11 (0 bit)
access : read-write

HICP1 : desc HICP1
bits : 13 - 12 (0 bit)
access : read-write

HICP2 : desc HICP2
bits : 14 - 13 (0 bit)
access : read-write


STFLR

desc STFLR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STFLR STFLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMFA OVFA

CMFA : desc CMFA
bits : 0 - -1 (0 bit)
access : read-write

OVFA : desc OVFA
bits : 1 - 0 (0 bit)
access : read-write


CMPAR

desc CMPAR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMPAR CMPAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMPA

CMPA : desc CMPA
bits : 0 - 14 (15 bit)
access : read-write



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